Advertisement

Real-time analysis of priority-preemptive NoCs with arbitrary buffer sizes and router delays

  • Borislav Nikolić
  • Sebastian Tobuschat
  • Leandro Soares Indrusiak
  • Rolf Ernst
  • Alan Burns
Article
  • 54 Downloads

Abstract

Nowadays available multiprocessor platforms predominantly use a network-on-chip (NoC) architecture as an interconnect medium, due to its good scalability and performance. During the last decade, NoCs received a significant amount of attention from the real-time community. One promising category of approaches suggests to employ already existing hardware features called virtual channels, and dedicate them, exclusively, to individual communication traffic flows. In this way, NoCs become more amenable to the real-time analysis, which is an essential requirement for providing both safe and tight worst-case analysis methods, and consequently deriving real-time guarantees. In this manuscript, we present the approach which falls in the aforementioned category. Specifically, we propose a novel method for the worst-case analysis of the NoC traffic, assuming the existence of per-flow dedicated virtual channels. Compared to the state-of-the-art techniques, our approach yields substantially tighter upper-bounds on the worst-case traversal times (WCTTs) of communication traffic flows. By employing the proposed method, resource over-provisioning can be mitigated to a large extent, and significant design-cost reductions can be achieved. Moreover, we implemented a cycle-accurate simulator of the assumed NoC architecture, and used it to assess the tightness of derived WCTT bounds. Finally, we reached an interesting conclusion that bigger virtual channel buffers do not necessarily lead to better results, and in many cases can be counter-productive, which is a very important finding for system designers.

Keywords

Real-time systems Embedded systems Network-on-chip Wormhole switching Virtual channels Priority-preemptive arbitration 

Notes

References

  1. Benini L, De Micheli G (2002) Networks on chips: a new soc paradigm. Comput J 35(1):70–78Google Scholar
  2. Burns A, Harbin J, Indrusiak L (2014) A wormhole noc protocol for mixed criticality systems. In: Proceedings of the 35th IEEE real-time systems symposiumGoogle Scholar
  3. Dally W (1992) Virtual-channel flow control. IEEE Trans Parallel Distrib Syst 3(2):194–205CrossRefGoogle Scholar
  4. Dally W, Seitz C (1987) Deadlock-free message routing in multiprocessor interconnection networks. IEEE Trans ComputGoogle Scholar
  5. Dasari D, Nikolić B, Nelis V, Petters SM (2013) NoC contention analysis using a branch and prune algorithm. ACM Trans Embed Comput Syst 13(3s):113Google Scholar
  6. Diemer J, Ernst R (2010) Back suction: service guarantees for latency-sensitive on-chip networks. In: International symposium on networks-on-chipGoogle Scholar
  7. de Dinechin BD, van Amstel D, Poulhiès M, Lager G (2014a) Time-critical computing on a single-chip massively parallel processor. In: Proceedings of the 17th conference on design automation and test in EuropeGoogle Scholar
  8. de Dinechin BD, Durand Y, van Amstel D, Ghiti A (2014b) Guaranteed services of the NoC of a manycore processor. In: Proceedings of the international workshop on network on chip architecturesGoogle Scholar
  9. Ferrandiz T, Frances F, Fraboul C (2011) A network calculus model for spacewire networks. In: Proceedings of the 17th IEEE conference on embedded and real-time computing and applicationsGoogle Scholar
  10. Goossens K, Dielissen J, Radulescu A (2005) Aethereal network on chip: concepts, architectures, and implementations. IEEE Des Test Comput 22(5):414–421CrossRefGoogle Scholar
  11. Henia R, Hamann A, Jersak M, Racu R, Richter K, Ernst R (2005) System level performance analysis–the symta/s approach. IEEE Proc Comput Digit Tech 152(2):148–166CrossRefGoogle Scholar
  12. Hu J, Marculescu R (2003) Energy-aware mapping for tile-based NoC architectures under performance constraints. In: Proceedings of the 8th Asia and South Pacific design automation conferenceGoogle Scholar
  13. Indrusiak LS (2014) End-to-end schedulability tests for multiprocessor embedded systems based on networks-on-chip with priority-preemptive arbitration. J Syst Archit 60(7):553–561CrossRefGoogle Scholar
  14. Indrusiak LS, Harbin J, Burns A (2015) Average and worst-case latency improvements in mixed-criticality wormhole networks-on-chip. In: Proceedings of the 27th Euromicro conference on real-time systemsGoogle Scholar
  15. Indrusiak LS, Burns A, Nikolić B (2016) Analysis of buffering effects on hard real-time priority-preemptive wormhole networks. Technical report arxiv:1606.02942
  16. Indrusiak LS, Burns A, Nikolić B (2018) Buffer-aware bounds to multi-point progressive blocking in priority-preemptive NoCs. In: Proceedings of the 21st conference on design automation and test in EuropeGoogle Scholar
  17. Intel (2013) Intel\(^{\textregistered }\) Xeon Phi. http://www.intel.com/content/www/us/en/processors/xeon/xeon-phi-detail.html
  18. Kalray (2014) MPPA-256 manycore processor. www.kalrayinc.com/kalray/products/#processors
  19. Kasapaki E, Schoeberl M, Sørensen RB, Müller C, Goossens K, Sparsø J (2016) Argo: a real-time network-on-chip architecture with an efficient gals implementation. IEEE Trans Very Large Scale Integr Syst 24(2):479–492CrossRefGoogle Scholar
  20. Kashif H, Patel H (2014) Bounding buffer space requirements for real-time priority-aware networks. In: Proceedings of the 19th Asia and South Pacific design automation conferenceGoogle Scholar
  21. Kashif H, Patel H (2016) Buffer space allocation for real-time priority-aware networks. In: Proceedings of the 22nd IEEE real-time and embedded technology and applications symposiumGoogle Scholar
  22. Kashif H, Gholamian S, Patel H (2014) SLA: a stage-level latency analysis for real-time communication in a pipelined resource model. IEEE Trans Comput 99Google Scholar
  23. Kavaldjiev NK, Smit GJM (2003) A survey of efficient on-chip communications for soc. In: Proceedings of the 4th symposium on embedded systemsGoogle Scholar
  24. Liu M, Becker M, Behnam M, Nolte T (2015a) Improved priority assignment for real-time communications in on-chip networks. In: Proceedings of the 23rd international conference on real-time networks and systemsGoogle Scholar
  25. Liu M, Behnam M, Nolte T (2015b) A stochastic response time analysis for communications in on-chip networks. In: Proceedings of the 21st IEEE conference on embedded and real-time computing and applicationsGoogle Scholar
  26. Liu M, Becker M, Behnam M, Nolte T (2016a) Scheduling real-time packets with non-preemptive regions on priority-based nocs. In: Proceedings of the 22nd IEEE conference on embedded and real-time computing and applicationsGoogle Scholar
  27. Liu M, Becker M, Behnam M, Nolte T (2016b) Tighter time analysis for real-time traffic in on-chip networks with shared priorities. In: International symposium on networks-on-chipGoogle Scholar
  28. Liu M, Becker M, Behnam M, Nolte T (2017) A tighter recursive calculus to compute the worst case traversal time of real-time traffic over NoCs. In: Proceedings of the 22nd Asia and South Pacific design automation conferenceGoogle Scholar
  29. Mesidis P, Indrusiak L (2011) Genetic mapping of hard real-time applications onto NoC-based MPSoCs—a first approach. In: 6th International workshop on reconfigurable communication-centric systems-on-chipGoogle Scholar
  30. Millberg M, Nilsson E, Thid R, Jantsch A (2004) Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip. In: Proceedings of the 7th conference on design automation and test in Europe, vol 2, pp 890–895Google Scholar
  31. Ni LM, McKinley PK (1993) A survey of wormhole routing techniques in direct networks. Comput J 26(2):62-76Google Scholar
  32. Nikolić B, Petters SM (2014a) Edf as an arbitration policy for wormhole-switched priority-preemptive NoCs—myth or fact? In: Proceedings of the 14th international conference on embedded softwareGoogle Scholar
  33. Nikolić B, Petters SM (2014b) Real-time application mapping for many-cores using a limited migrative model. Real-Time Syst JGoogle Scholar
  34. Nikolić B, Pinho LM (2017) Optimal minimal routing and priority assignment for priority-preemptive real-time NoCs. Real-Time Syst JGoogle Scholar
  35. Nikolić B, Awan MA, Petters SM (2011) SPARTS: Simulator for power aware and real-time systems. In: Proceedings of the 8th IEEE international conference on embedded software and systemsGoogle Scholar
  36. Nikolić B, Ali HI, Petters SM, Pinho LM (2013) Are virtual channels the bottleneck of priority-aware wormhole-switched NoC-based many-cores? In: Proceedings of the 21st international conference on real-time networks and systemsGoogle Scholar
  37. Nikolić B, Yomsi PM, Petters SM (2014) Worst-case communication delay analysis for many-cores using a limited migrative model. In: Proceedings of the 20th IEEE conference on embedded and real-time computing and applicationsGoogle Scholar
  38. Nikolić B, Indrusiak LS, Petters SM (2016a) A tighter real-time communication analysis for wormhole-switched priority-preemptive NoCs. Technical report arxiv:1605.07888
  39. Nikolić B, Pinho LM, Indrusiak LS (2016b) On routing flexibility of wormhole-switched priority-preemptive nocs. In: Proceedings of the 22nd IEEE conference on embedded and real-time computing and applicationsGoogle Scholar
  40. Paukovits C, Kopetz H (2008) Concepts of switching in the time-triggered network-on-chip. In: Proceedings of the 14th IEEE conference on embedded and real-time computing and applications, pp 120–129Google Scholar
  41. Racu A, Indrusiak L (2012) Using genetic algorithms to map hard real-time on noc-based systems. In: 7th international workshop on reconfigurable communication-centric systems-on-chipGoogle Scholar
  42. Rambo EA, Ernst R (2015) Worst-case communication time analysis of networks-on-chip with shared virtual channels. In: Proceedings of the 18th conference on design automation and test in EuropeGoogle Scholar
  43. Sayuti M, Indrusiak L (2013) Real-time low-power task mapping in networks-on-chip. In: IEEE computer society annual symposium on VLSIGoogle Scholar
  44. Schoeberl M (2007) A time-triggered network-on-chip. In: Proceedings of the 17th international conference on field-programmable logic and applicationsGoogle Scholar
  45. Schoeberl M, Abbaspour S, Akesson B, Audsley N, Capasso R, Garside J, Goossens K, Goossens S, Hansen S, Heckmann R, Hepp S, Huber B, Jordan A, Kasapaki E, Knoop J, Li Y, Prokesch D, Puffitsch W, Puschner P, Rocha A, Silva C, Sparsø J, Tocchi A (2015) T-CREST: time-predictable multi-core architecture for embedded systems. J Syst Archit 61(9):449–471CrossRefGoogle Scholar
  46. Shi Z, Burns A (2008a) Priority assignment for real-time wormhole communication in on-chip networks. In: Proceedings of the 29th IEEE real-time systems symposiumGoogle Scholar
  47. Shi Z, Burns A (2008b) Real-time communication analysis for on-chip networks with wormhole switching. In: International symposium on networks-on-chipGoogle Scholar
  48. Shi Z, Burns A (2010) Schedulability analysis and task mapping for real-time on-chip communication. Real-Time Syst J 46(3):360–385CrossRefzbMATHGoogle Scholar
  49. Shi Z, Burns A, Indrusiak LS (2010) Schedulability analysis for real time on-chip communication with wormhole switching. Int J Embed Real-Time Commun SystGoogle Scholar
  50. Song H, Kwon B, Yoon H (1997) Throttle and preempt: a new flow control for real-time communications in wormhole networks. In: Proceedings of the 1997 international conference on parallel processingGoogle Scholar
  51. Stefan RA, Molnos A, Goossens K (2012) daelite: A TDM NoC supporting QoS, multicast, and fast connection set-up. IEEE Trans Comput 63(3)Google Scholar
  52. Tobuschat S, Ernst R (2017) Real-time communication analysis for networks-on-chip with backpressure. In: Proceedings of the 20th conference on design automation and test in EuropeGoogle Scholar
  53. Xiong Q, Lu Z, Wu F, Xie C (2016) Real-time analysis for wormhole NoC: revisited and revised. In: Proceedings of the 26th ACM great lakes symposium on VLSIGoogle Scholar
  54. Xiong Q, Wu F, Lu Z, Xie C (2017) Extending real-time analysis for wormhole NoCs. IEEE Trans Comput 66(9):1532–1546MathSciNetCrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC, part of Springer Nature 2018

Authors and Affiliations

  • Borislav Nikolić
    • 1
  • Sebastian Tobuschat
    • 1
  • Leandro Soares Indrusiak
    • 2
  • Rolf Ernst
    • 1
  • Alan Burns
    • 2
  1. 1.Institute of Computer and Network EngineeringTechnische Universität BraunschweigBrunswickGermany
  2. 2.Real-Time Systems Group, Department of Computer ScienceUniversity of YorkYorkUK

Personalised recommendations