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History table-based linear analysis method for DRAM-PCM hybrid memory system

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Abstract

This research is to design a history table-based linear analysis method for a DRAM-PCM (phase change memory) hybrid memory system supporting irregular and complex memory accessing patterns in graph processing applications. This linear analysis method can analyze complex memory access patterns in real time through our history table structure, classifying address values requested from the LLC (last-level cache) as the prefetch candidates. Also, the proposed method is to support a prefetching operation from the storage onto the hybrid main memory, causing significant latency losses. Specifically, we proposed a new memory pattern analysis method, which is called a linear analysis based on a history table, to detect any linear memory access patterns from workloads showing irregular accessing characteristics. For the DRAM-PCM hybrid memory, dynamic data that are frequently accessed are stored in the DRAM. Thus, our linear analysis not only categorizes memory access patterns in the form of line patterns but also separates dynamic and static data so that the hybrid memory systems can be managed adaptively and efficiently. Our experiments show that our model can improve performance and energy consumption by 60% and 30%, respectively, compared to those of the traditional DRAM-only memory model. Moreover, our approach can enhance the entire system performance and energy consumption by 11.3%, 6.8%, compared to streamlined prefetcher-based models.

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Acknowledgements

This work was supported by the National Research Foundation of Korea funded by the Korea government (MSIT) (NRF-2019R1A2C1008716) and supported (in part) by the Yonsei University Research Fund (Post Doc. Researcher Supporting Program) of 2021 (project no.: 2021-12-0031).

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Authors and Affiliations

  1. Yonsei University, Seoul, Republic of Korea

    Jeong-Geun Kim & Shin-Dug Kim

  2. Samsung Electronics, Suwon-si, Gyeonggi-do, Republic of Korea

    Yoon-Su Jo

  3. Division of Computer Science and Engineering, Jeonbuk National University, Jeonju-si, Jeollabuk-do, Republic of Korea

    Su-Kyung Yoon

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  1. Jeong-Geun Kim
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  2. Yoon-Su Jo
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  4. Shin-Dug Kim
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Contributions

This article is based on Yoon-su Jo’s work and his thesis (not published to any other forms of article) [26], and Jeong-geun Kim contributed following parts: conceptualization, experimental methodology (implementing binary instrumentation tool-based trace generator and fundamental basis for simulators), and writing for draft and editing. All authors have read and agreed to the manuscript and authorship.

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Correspondence to Shin-Dug Kim.

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Kim, JG., Jo, YS., Yoon, SK. et al. History table-based linear analysis method for DRAM-PCM hybrid memory system. J Supercomput 77, 12924–12952 (2021). https://doi.org/10.1007/s11227-021-03786-5

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