Elliptic Curve Cryptography hardware accelerator for high-performance secure servers

  • Luis Parrilla
  • José A. Álvarez-Bermejo
  • Encarnación Castillo
  • Juan A. López-Ramos
  • Diego P. Morales-Santos
  • Antonio García


Security threats affecting electronics communications in the current world make necessary the encryption and authentication of every transaction. The increasing levels of security required are leading to an overload of transaction servers due to cryptographic tasks. In this paper, a hardware-implemented coprocessor for Elliptic Curve Cryptography operations is presented. This coprocessor enables the acceleration of secure services and can be implemented in the last generations FPGA, thus allowing to host in the same chip a software secure web/database server and the cryptographic coprocessor. Obtained results show advantages of the proposed solution when compared to software implementations and classical acceleration using graphics processing units. Moreover, the proposed cryptographic coprocessor presents improvements over other hardware implementations when area, performance and scalability are considered. The developed crypto-processor has been implemented in a xc7z020clg484-1 device from Xilinx, taking advantage of the synergy provided by the ARM microprocessors and the programmable logic for hardware implementations included in the device. This design requires only 9852 LUTs, while providing 8930 scalar-point operations per second when operating at 50 MHz, with a power consumption of 0.42 W.


Elliptic Curve Cryptography Hardware accelerator Codesign FPGA 


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Authors and Affiliations

  1. 1.Department Electronics and Computer TechnologyUniversidad de GranadaGranadaSpain
  2. 2.Department InformaticsUniversidad de AlmeríaAlmeríaSpain
  3. 3.Department MathematicsUniversidad de AlmeríaAlmeríaSpain

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