High-performance architecture for flow-table lookup in SDN on FPGA

Abstract

We propose range-based ternary search tree (RTST), a tree-based approach for flow-table lookup in SDN. RTST builds upon flow-tables in SDN switches to provide a fast lookup among flows. We present a parallel multi-pipeline architecture for implementing RTST that benefits from high throughput and low latency. The proposed RTST and architecture achieve a memory efficiency of 1 byte of memory for each byte of flow. We also present a set of techniques to support dynamic updates. Experimental results reveal that RTST can be used to improve the performance of flow-lookup. It achieves a throughput of 670 million packets per second (MPPS), for a 1K 15-tuple flow-table, on a state-of-the-art FPGA (Virtex 6 XC6VLX760).

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Correspondence to Hossein Bahramgiri.

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Hatami, R., Bahramgiri, H. High-performance architecture for flow-table lookup in SDN on FPGA. J Supercomput 75, 384–399 (2019). https://doi.org/10.1007/s11227-018-02732-2

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Keywords

  • Software-defined networking (SDN)
  • Flow-table
  • Range-based ternary search tree (RTST)
  • Field-programmable gate array (FPGA)
  • Pipeline architecture