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Synchronization algorithm for predictors for SDRAM memories

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Abstract

In the arsenal of resources for computer memory system performance improvement, predictors have gained an increasing role in the past years. They can suppress latencies when accessing cache or main memory. In our previous work we considered using predictors to decrease Synchronized Dynamic Random Access Memory (SDRAM) latency. If one wants to apply several predictors at the same time, there has to exist proper synchronization of the predictors. This stems from the fact that SDRAM controller has to activate and update each of the predictors at proper times, while at the same time executing standard SDRAM commands, such as opening/closing rows, accessing columns, etc. In this paper we propose a universal synchronization algorithm for predictors for SDRAM memories, which can be used with practically any predictor, regardless of its specific method of predicting, and with very little or no modifications.

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Acknowledgments

The authors would like to thank the anonymous reviewers for their insightful and constructive feedback. The research presented in this paper was supported in part by the Serbian Ministry of Education, Science and Technological Development [TR32012].

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Authors and Affiliations

  1. Faculty of Electronic Engineering, University of Nis, Aleksandra Medvedeva 14, 18000, Nis, Serbia

    Vladimir V. Stankovic & Nebojsa Z. Milenkovic

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  1. Vladimir V. Stankovic
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  2. Nebojsa Z. Milenkovic
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Correspondence to Vladimir V. Stankovic.

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Stankovic, V.V., Milenkovic, N.Z. Synchronization algorithm for predictors for SDRAM memories. J Supercomput 71, 3609–3636 (2015). https://doi.org/10.1007/s11227-015-1452-6

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  • DOI: https://doi.org/10.1007/s11227-015-1452-6

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