Skip to main content
Log in

Integrated circuit design of a discrete memristive chaotic system optimized by the fixed-point specific processor with acceleration instructions

  • Research
  • Published:
Nonlinear Dynamics Aims and scope Submit manuscript

Abstract

Currently, design and application of discrete memristor aroused much interests. In this paper, digital integrated circuits of discrete memristive systems are designed based on the proposed fixed-point specific processor with acceleration instructions. The discrete memristor and the discrete memristive chaotic map are designed based on the trigonometric function including the Sine function and the Cosh function. It shows that the chaotic system has rich dynamics and can generate hyperchaos. To design a universal digital integrated circuit implementation method, a fixed-point specific processor is designed which is programmable. As a result, the chip layout of the memristive systems is obtained. Numerical simulations are completed in accordance with the Matlab simuation results. Compared with the ASIC(Application-Specific Integrated Circuit) based method, the digital circuit in this paper is two times larger in area and has 50% more power consumption due to the trigonometric and hyperbolic functions, but it can be reprogrammed to implement different models. It provides a new technical scheme for the application of discrete memristors in different engineering application fields.

This is a preview of subscription content, log in via an institution to check access.

Access this article

We’re sorry, something doesn't seem to be working properly.

Please try refreshing the page. If that doesn't work, please contact support so we can address the problem.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14
Fig. 15
Fig. 16
Fig. 17

Similar content being viewed by others

Data availability

No/Not applicable (this manuscript does not report data generation or analysis).

References

  1. Chua, L.O.: Memristor-the missing circuit element. IEEE Trans. Circuit Theory 18, 507–519 (1971)

    Article  Google Scholar 

  2. Strukov, D.B., Snider, G.S., Stewart, D.R., Williams, R.S.: The missing memristor found. Nature 453, 80–83 (2008)

    Article  Google Scholar 

  3. Zhang, S., Li, C., Zheng, J., Wang, X., Zeng, Z., Peng, X.: Generating any number of initial offset-boosted coexisting chua’s double-scroll attractors via piecewise-nonlinear memristor. IEEE Trans. Ind. Electron. 69, 7202–7212 (2021)

    Article  Google Scholar 

  4. Wang, L., Dong, T., Ge, M.-F.: Finite-time synchronization of memristor chaotic systems and its application in image encryption. Appl. Math. Comput. 347, 293–305 (2019)

    Google Scholar 

  5. Bao, G., Zhang, Y., Zeng, Z.: Memory analysis for memristors and memristive recurrent neural networks. IEEE/CAA J. Autom. Sin. 7, 96–105 (2020)

    Article  Google Scholar 

  6. Yi fei Pu and Bo Yu: A large dynamic range floating memristor emulator with equal port current restriction. IEEE/CAA J. Autom. Sin. 7, 237–243 (2020)

    Article  Google Scholar 

  7. Zheng Jun Chew and Lijie Li: A discrete memristor made of ZnO nanowires synthesized on printed circuit board. Mater. Lett. 91, 298–300 (2013)

    Article  Google Scholar 

  8. He, S., Sun, K., Peng, Y., Wang, L.: Modeling of discrete fracmemristor and its application. AIP Adv. 10, 015332 (2020)

    Article  Google Scholar 

  9. Bao, H., Hua, Z., Li, H., Chen, M., Bao, B.: Discrete memristor hyperchaotic maps. IEEE Trans. Circuits Syst. I Regul. Pap. 68, 4534–4544 (2021)

    Article  Google Scholar 

  10. Ding, Y., Liu, W., Wang, H., Sun, K.: A new class of discrete modular memristors and application in chaotic systems. Eur. Phys. J. Plus 138(7), 638 (2023)

    Article  Google Scholar 

  11. Yihyis, W.A., He, S., Tang, Z., Wang, H.: A class of discrete memristor chaotic maps based on the internal perturbation. Symmetry 15, 1574 (2023)

    Article  Google Scholar 

  12. Liu, T., Mou, J., Xiong, L., Han, X., Yan, H., Cao, Y.: Hyperchaotic maps of a discrete memristor coupled to trigonometric function. Phys. Scr. 96, 125242 (2021)

    Article  Google Scholar 

  13. Yuan, F., Bai, C.-J., Li, Y.-X.: Cascade discrete memristive maps for enhancing chaos. Chin. Phys. B 30, 120514 (2021)

    Article  Google Scholar 

  14. Longxiang, F., He, S., Wang, H., Sun, K.: Simulink modeling and dynamic characteristics of discrete memristor chaotic system. Acta Phys. Sin. 71, 030501 (2022)

    Article  Google Scholar 

  15. Ma, M., Yang, Y., Qiu, Z., et al.: A locally active discrete memristor model and its application in a hyperchaotic map. Nonlinear Dyn. 107, 2935–2949 (2021)

    Article  Google Scholar 

  16. Li, H., Hua, Z., Bao, H., Zhu, L., Chen, M., Bao, B.: Two-dimensional memristive hyperchaotic maps and application in secure communication. IEEE Trans. Ind. Electron. 68, 9931–9940 (2021)

    Article  Google Scholar 

  17. Lai, Q., Lai, C., Zhang, H., Li, C.: Hidden coexisting hyperchaos of new memristive neuron model and its application in image encryption. Chaos Solitons Fract. 58, 112017 (2022)

    Article  MathSciNet  Google Scholar 

  18. Vishal, S.: A compact cmos memristor emulator circuit and its applications. In 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 190–193, (2018)

  19. Yener, S., Kuntman, H.: A new cmos based memristor implementation. In 2012 International Conference on Applied Electronics, pp. 345–348, (2012)

  20. Ersoy, D., Kaçar, F.: Electronically charge-controlled tunable meminductor emulator circuit with otas and its applications. IEEE Access 11, 53290–53300 (2023)

    Article  Google Scholar 

  21. Raj, N., Ranjan, R.K., James, A.: Chua’s oscillator With OTA based memcapacitor emulator. IEEE Trans. Nanotechnol. 21, 213–218 (2022)

    Article  Google Scholar 

  22. Ntinas, V., Vourkas, I., Abusleme, A., Sirakoulis, G.C., Rubio, A.: Experimental study of artificial neural networks using a digital memristor simulator. IEEE Trans. Neural Netw. Learn. Syst. 29, 5098–5110 (2018)

    Article  Google Scholar 

  23. Tolba, M.F., Fouda, M.E., Hezayyin, H.G., et al.: Memristor FPGA IP core implementation for analog and digital applications. IEEE Trans. Circuits Syst. II Express Briefs 66, 1381–1385 (2019)

    Google Scholar 

  24. Mohamed, S.M., Sayed, W.S., Radwan, A.G., Said, L.A.: FPGA implementation of reconfigurable CORDIC algorithm and a memristive chaotic system with transcendental nonlinearities. IEEE Trans. Circuits Syst. I Regul. Pap. 69, 2885–2892 (2022)

    Article  Google Scholar 

  25. Tolba, M.F., Sayed, W.S., Fouda, M.E., et al.: Digital emulation of a versatile memristor with speech encryption application. IEEE Access 7, 174280–174297 (2019)

    Article  Google Scholar 

  26. Lai, Q., Yang, L., Liu, Y.: Design and realization of discrete memristive hyperchaotic map with application in image encryption. Chaos Solitons Fract. 165(1), 112781 (2022)

    Article  Google Scholar 

  27. Volder, J.E.: The CORDIC trigonometric computing technique. IRE Trans. Electron. Comput. 8, 330–334 (1959)

    Article  Google Scholar 

  28. Walther, J.S.: A unified algorithm for elementary functions. In Proceedings of the May 18–20, 1971, Spring Joint Computer Conference, AFIPS ’71 (Spring), pp. 379–385, New York, NY, USA . Association for Computing Machinery (1971)

  29. Zhao, Y., Ding, J., He, S., Wang, H., Sun, K.: Fully fixed-point integrated digital circuit design of discrete memristive systems. AEU-Int. J. Electron. Commun. 161, 154522 (2023)

    Article  Google Scholar 

Download references

Funding

This work was supported by the Natural Science Foundation of China (Nos. 61901530, 62071496, 62061008), the Natural Science Foundation of Hunan Province (No. 2020JJ5767) and the Centre for Nonlinear Systems, Chennai Institute of Technology, India vide funding number CIT/CNS/2024/RP/012.

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Shaobo He.

Ethics declarations

Conflict of interest

The authors declared that they have no Conflict of interest to this work.

Additional information

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Zhao, Y., Parastesh, F., He, S. et al. Integrated circuit design of a discrete memristive chaotic system optimized by the fixed-point specific processor with acceleration instructions. Nonlinear Dyn 112, 10451–10464 (2024). https://doi.org/10.1007/s11071-024-09624-6

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s11071-024-09624-6

Keywords

Navigation