Experimental observation of destabilization in a DC bus system and its stabilization with delayed feedback control

Abstract

Direct-current (DC) bus systems are expected to play a significant role in next-generation power technology because of the rapid development of power electronics. However, it is well known that the bus line voltage can become unstable when electric power through the bus line is constantly consumed by loads. Bifurcation analysis of this instability has been previously performed. It has been reported that in theory, delayed feedback control, which was developed to stabilize chaotic systems, can suppress this instability. For practical applications, it is necessary to confirm these analytical results with circuit experiments. In this study, the dynamics of a DC bus system without control and with delayed feedback control are experimentally investigated. The following three main results are obtained. First, bifurcation phenomena are experimentally found to occur with an increase in power consumption in the DC bus system without control. Second, it is experimentally found that delayed feedback control stabilizes the operating point. These results provide experimental evidence that delayed feedback control can be utilized as a stabilization method for DC bus systems. Third, it is experimentally demonstrated that the delayed feedback controller can track the operating point when the power consumption changes slowly, but not when it changes rapidly. A frequency-domain analysis is conducted to analytically estimate the upper limit of the acceptable power consumption rate of change. The estimated upper limit is useful for designing the controller and restricting the change rate of power consumption.

Appendices

Appendix A: Comparison to adaptive techniques

Fig. 17

Circuit diagram of amplifier connected to $R_{L}$ in CPL circuit

Fig. 18

Bipolar power supply connected to DC bus line to set initial voltages

Fig. 19

Circuit implementation of delay unit

Derivative control and low-/high-pass first-order RC filter techniques can also track the operating point. However, derivative control is sensitive to high-frequency noise in practical situations, because its control law requires differentiation. Moreover, low-/high-pass first-order RC filter techniques require an additional large capacitor (e.g., an electrolytic capacitor) to stabilize the system. In general, capacitors have a high maintenance cost and reduce the lifetime of power electronic equipment [52, 53]. In contrast, delayed feedback control requires neither differentiation [54] nor capacitors.

Appendix B: Amplifier in CPL

A circuit diagram of an amplifier connected to load resistance $R_{L}$ in the CPL circuit (see Fig. 3) is shown in Fig. 17, where the main device is an audio power amplifier (LM3886, Texas Instruments).

Appendix C: Experimental procedure for setting initial points

This appendix describes the experimental procedure used for setting the initial points $v_{P}(0)$$(\Leftrightarrow x(0))$ and $i_{L}(0)$$(\Leftrightarrow y(0))$. To set these points to the desired voltage and current, a bipolar power supply, which consists of a standard DC power supply (PW18-2, KENWOOD) and a constant voltage load (CVL) (PLZ164W, KIKUSUI), is connected to the bus line as illustrated in Fig. 18. When the switch is closed, the initial bus voltage is fixed at $v_P(0) = v_{P0}$, where $v_{P0}$ can be set to the desired value. The initial bus line current depends on $v_{P0}$, $i_L(0) = (E-v_{P0}) / r$; thus, these initial points are on the nullcline $\dot{y} = 0$. When the switch is opened, the DC bus system starts from the initial voltage and current.

Appendix D: Digital implementation of delay unit

The circuit of the delay unit is shown in Fig. 19. In this unit, a peripheral interface controller (PIC; PIC18F2550-I/SP, Microchip Technology) is used as a digital computer. Voltage $v_{p}(t)$ is applied to the level-shift circuit, which shifts the voltage range of $v_{p}(t)$ to the range 0–5 V, since the PIC can deal with this range. The shifted voltage is sent to the input terminal RA0 of an analog-to-digital converter built into the PIC and transformed into a digital data. The received data are delayed using the first-in-first-out rule program on the PIC. The delayed voltage signal is sent to the output terminals RB0, RB1,$\ldots$, RB7 and transformed into an analog voltage by a digital-to-analog converter (R-2R ladder). The delayed analog voltage is transformed into a voltage in the original voltage range by a differential amplifier. The delayed voltage $v_{p}(t-\mathrm {\Gamma })$ is applied to feedback resistance $r_{k}$. The control current $i_{u}(t)$ in Eq. (9) is injected into the bus line.

The PIC has an analog-to-digital converter with 8-bit resolution and a sampling period of ${25}\,\upmu \hbox {s}$. The voltage resolution (0.043 V) is just $0.24 \%$ of the source voltage E; the sampling period (${25}\,\upmu \hbox {s}$) is about $1 \%$ of the natural period of the operating point. This resolution and this period are small and short enough for the digital controller to be used as an ideal analog controller.