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Image encryption with a Josephson junction model embedded in FPGA

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Abstract

The dynamical analysis, field programmable gate array (FPGA) implementation and image encryption of a linear piecewiseresistive-capacitive-inductive shunted Josephson junction (LPRCISJJ) model are reported in this paper. The numerical simulations of LPRCISJJ model reveal the existence of periodic attractors, bistable periodic attractors, antimonotonicity phenomenon and hidden chaotic attractors with different shapes by varying its parameters. Numerical simulations and FPGA results produce alike timing evolutions and phase planes. Chaotic LPRCISJJ model is used as a pseudo-random number generator (PRNG) in the design of cryptography algorithm based on bit-level permutation. The designed algorithm performs bit masking and relocation depending on the amount of information the bit contains in the pixel. The standard image security analysis on color Lena image of size 512 × 512 are performed and compared with good standing papers in the literature. Prominent outcomes in term of mean entropy of 7.9994, mean NPCR of 99.62%, key sensitivity percentage of 99.68%, average correlation of 0.002 are obtained just to name a few. These security tests carried out certify its resistance to common attacks and its high sensitivity to one-bit changes in the key or image to be encrypted.

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Acknowledgements

This work is partially funded by the Center for Nonlinear Systems, Chennai Institute of Technology, India via funding number CIT/CNS/2021/RD/064

Author information

Authors and Affiliations

  1. Center for Nonlinear Systems, Chennai Institute of Technology, Chennai, Tamilnadu, 600069, India

    Balamurali Ramakrishnan & Anitha Karthikeyan

  2. Signal, Image and Systems Laboratory, Department of Medical and Biomedical Engineering, HTTTC (Higher Technical Teacher’s Training College), University of Yaoundé I, P.O. BOX 886, Ebolowa, Cameroon

    Pascal Yannick Nkandeu Kamdeu & Alain Tiedeu

  3. Information Technology College, Imam Ja’afar Al-Sadiq University, Baghdad, 10001, Iraq

    Hayder Natiq

  4. Research Unit of Automation and Applied Computer (RU-AIA), Electrical Engineering Department of IUT-FV, University of Dschang, P.O. Box: 134, Bandjoun, Cameroon

    Justin Roger Mboupda Pone

  5. Department of Mechanical, Petroleum and Gas Engineering, National Advanced School of Mines and Petroleum Industries, University of Maroua, P.O. Box 46, Maroua, Cameroon

    Sifeu Takougang Kingni

  6. Centre for Research, Experimentation and Production (CREP), HTTTC of Ebolowa, PO Box 886, Ebolowa, Cameroon

    Alain Tiedeu

Authors
  1. Balamurali Ramakrishnan
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  2. Pascal Yannick Nkandeu Kamdeu
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  3. Hayder Natiq
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  4. Justin Roger Mboupda Pone
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  5. Anitha Karthikeyan
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  6. Sifeu Takougang Kingni
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  7. Alain Tiedeu
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Contributions

Balamurali Ramakrishnan and Hayder Natiq developed the model and analyzed the rate-equations of the proposed model. Balamurali Ramakrishnanand Anitha Karthikeyandid the FPGA implementation of the proposed model. Yannick Pascal Kamdeu Nkandeu and Justin Roger Mboupda Pone did the image encryption schememe using the proposed model. Sifeu Takougang Kingni and Alain Tiedeu participated in the data analysis at different stages. All authors contributed to the interpretation of the results and writing of the manuscript.

Corresponding author

Correspondence to Justin Roger Mboupda Pone.

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Ramakrishnan, B., Nkandeu Kamdeu, P.Y., Natiq, H. et al. Image encryption with a Josephson junction model embedded in FPGA. Multimed Tools Appl 81, 23819–23843 (2022). https://doi.org/10.1007/s11042-022-12400-6

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  • DOI: https://doi.org/10.1007/s11042-022-12400-6

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