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A simplified rectification method and its hardware architecture for embedded multimedia systems

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Abstract

Stereo vision, a future disruptive technology for obtaining three-dimensional distance information, can be applied to various embedded multimedia systems. Reducing the computational overhead of stereo vision necessitates the pre-processing procedure of rectification. For the implementation of rectification, several studies have proposed a look-up table- and computational logic-based approaches. However, the former exhibits excessive growth of memory with an increasing resolution of the image, and the latter requires numerous hardware resources for implementing the necessary computational logic. Thus, this paper proposes a simplified rectification calculation method and its optimized hardware architecture. By replacing matrix multiplications of the conventional method with simple accumulations and removing division operations, the proposed method reduces addition, multiplication, and division operations by 50, 100, and 100 %, respectively, compared with the conventional method. Although the experimental results show negligible differences between rectification by the conventional method and that by the proposed method, the latter consumes fewer hardware resources. Therefore, the proposed method and its architecture are more practical for real-time embedded multimedia systems.

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Acknowledgments

This research was supported by the MSIP (Ministry of Science, ICT and Future Planning), Korea, under the ITRC (Information Technology Research Center) (IITP-2016-H8601-16-1002) supervised by the IITP (Institute for Information & communications Technology Promotion).

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Correspondence to Byungin Moon.

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Hyun, J., Moon, B. A simplified rectification method and its hardware architecture for embedded multimedia systems. Multimed Tools Appl 76, 19761–19779 (2017). https://doi.org/10.1007/s11042-016-3517-9

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  • DOI: https://doi.org/10.1007/s11042-016-3517-9

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