1 Introduction

Single-electron turnstiles (SET) are devices that transfer an integer number of electrons between two terminals clocked with a radio-frequency (RF) signal of frequency f [1,2,3,4]. Consequently, these systems generate, ideally, a current \(I=Nef\) with e the elementary charge and N an integer. These implementations are candidates for a current standard following the revision of the SI (système international d’unités) [5] in which the ampere has been defined in terms of the electron charge and the unperturbed ground state hyperfine transition frequency of the caesium 133 atom. Several other proposals have been implemented in order to satisfy metrological requirements for a realization of the ampere, mainly single-electron transport ones [4, 6, 7]. Of particular interest have been hybrid single-electron turnstiles composed of superconducting (S) source and drain electrodes separated by insulating (I) barriers from a normal-metal (N) island (SINIS) [8]. This configuration has been intensively researched as a current standard [8,9,10,11,12,13] among other applications [14,15,16,17]. So far, the operation of this device has consisted of applying a nonzero source-drain bias defining the current direction. Additionally, an RF signal was applied to a gate electrode capacitively coupled to the island. However, recently, it was demonstrated that applying a modulation to the source electrode delivers similar results and even blocks back-tunnelling error events [18].

We show that, by applying RF modulation to the source electrode and following a similar driving strategy as in Ref. [18], generation of single-electron currents is possible even when the DC bias signal is zero, therefore having zero average bias within one driving period. Furthermore, we demonstrate the ability to generate current bidirectionally while keeping zero DC bias, by phase-shifting the source signal. In the past, this has been achieved in silicon quantum dot single-electron pumps, although this required three waveforms for achieving current generation [19]. The proposed scheme has similarities with all-metallic electron pumps [20, 21], which were among the first single-electron transport ampere realizations and quantum capacitance standard [22], in the sense that current can be generated with more than a single waveform at zero bias and flipped by phase-shifting one of such signals.

2 Experimental Methods

2.1 Fabrication

We employ a SINIS single-electron transistor such as the one depicted in the false-color electronic micrograph of Fig. 1a. We used copper for the normal metal island (red in Fig. 1a) and aluminum for the superconducting source and drain leads (blue in Fig. 1a). The device was fabricated using electron beam lithography (EBL) and electron beam double-angle metal evaporation. The metal films were deposited on top of a silicon oxide-coated silicon wafer and through a germanium hard mask [23]. To form this mask, first the wafer is coated with a layer of poly(methyl methacrylate-methacrylic acid) (P(MMA-MAA)) with thickness of approximately \(400\,\mathrm {nm}\), then we evaporate a \(22\,\mathrm {nm}\) thick layer of germanium on top and finally, we coat with a \(50\,\mathrm {nm}\) thick layer of poly(methyl methacrylate) (PMMA) on top. Then we use EBL (Vistec EBPG5000+ operating at 100 kV) to expose the PMMA and create the required pattern in the top layer by standard development with a mixture of methylisobutyl-ketone and isopropanol (1 to 3 by weight) after cleaving the wafer into smaller chips for easier handling. Next, the pattern is transferred to the intermediate germanium layer by reactive ion etching (RIE) in carbon tetrafluoride \(\mathrm {CF_4}\) and then, inside the same chamber, transferred to the bottom P(MMA-MAA) layer by etching with oxygen which also helps to open an undercut profile. The structure is metallized as follows, first we evaporate \(20\,\mathrm {nm}\) of aluminum at an angle of \(15.2^\circ \) forming the leads. We then perform an in situ oxidation of the surface of this layer in pure oxygen at a pressure of \(2.2\,\mathrm {mbar}\) for 2 minutes. To form the island we deposit \(30\,\mathrm {nm}\) of copper at an angle of \(-14.8^\circ \). Next, we remove the excess metal and P(MMA-MAA) by soaking the samples in acetone.

2.2 Measurements

A chip containing several samples is then cleaved to fit into a custom-made sample carrier. We incorporated surface mount inductors and capacitors to this carrier to form bias tees for applying AC+DC signals through appropriate input ports to the source and gate electrodes as shown in Fig. 1a whereas the drain is connected to a pure DC line. The chip is attached to the carrier and connected to the corresponding electrodes by aluminum bonds. The carrier is then connected to the electrical lines of a custom made dilution refrigerator at a base temperature \(\sim 100\,\mathrm {mK}\) and thermally attached to its mixing chamber. The DC signals are applied using cryogenic lines composed of resistive twisted pairs from a breakout box at room temperature down to the \(1\,\mathrm {K}\) stage followed by a nearly \(1\,\mathrm {m}\) long Thermocoax cable down to the mixing chamber. We apply RF signals through the stainless steel coaxial lines installed between the room temperature and \(4.2\,\mathrm {K}\) flange, then follows a \(20\,\mathrm {dB}\) attenuator. At the same stage, the line is connected to a feedthrough into the inner vacuum can in which the signal is carried by a superconducting NbTi cable from the \(1\,\mathrm {K}\) flange down to the RF input of the sample carrier. We add extra attenuation at room temperature, \(40\,\mathrm {dB}\) for the source modulation and \(20\,\mathrm {dB}\) for the gate one. The signals are generated by programmable DC and waveform generators. For generating DC signals, the isolated voltage source is used (Stanford Research Systems SIM928). For generating RF signals, we use both channels of the 2-channel arbitrary waveform generator (Keysight, model 33522B) therefore ensuring proper synchronization and phase shift between the bias and gate signals. Current is measured as the output voltage of a transimpedance room temperature amplifier (FEMTO Messtechnik, model LCA-2-10T) which is connected to the drain electrode of the device (ammeter in Fig. 1a) via a DC line. We repeat each measurement of the generated current 15 times and later average it while excluding those repetitions during which a charge offset jump was observed.

Fig. 1
figure 1

a Coloured electron micrograph with the measurement circuit used. Red is normal metal, blue is superconductor. \(V_\mathrm {0b}\), DC bias voltage; \(A_\mathrm {b}\), peak-to-peak (pp) bias amplitude; \(n_\mathrm {0g}\), DC gate-induced island charge; \(A_\mathrm {g}\), pp charge-normalized gate amplitude; I, generated current; A, ammeter. b DC IV curve. Green vertical lines are measured data within several gate periods. c Stability diagram for a SINIS SET with symmetric junctions. Inside the Coulomb diamonds, ideally, no current flows in the DC regime. Light green diamond corresponds to the island with excess charge \(n=0\) and orange diamond with \(n=1\). Lines are tunnelling thresholds, blue (red) corresponds to right (left) junction, continuous (dashed) lines correspond to tunnelling into (out of) the island. Crossing the line adds or removes one electron to or from the island. d Stability diagram zoomed-in to the intersection of the Coulomb diamonds, showing different turnstile driving paths. (0) is the conventional gate driving, (1) designates the driving sequence of Eq. (2) with the plus sign and (2) designates the driving sequence of Eq. (2) with the minus sign

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2.3 DC Characteristics and Pumping Method

The device under test in this work is the same as the one used in Ref. [18]. The DC characteristics of the system are shown in Fig. 1b. We measured the current in this plot by sweeping the DC gate voltage along a couple of charge periods at a fixed DC bias voltage (a single vertical line) at several biases. The following parameters of the device were determined by calculating the maximum and minimum current in DC with a Markovian model: lead superconducting gap \(\Delta =210\,{\mu}\text{eV}\), island charging energy \(E_\mathrm {c}=2.48\Delta \), total normal-state tunnel resistance \(R_\mathrm {T}=4.53\,\mathrm {M\Omega }\), ratio between left and right junction resistances \(r=0.15\) and Dynes parameter [24] \(\eta =3.5\times 10^{-4}\). See Ref. [18] for an explanation of the model. Most importantly, it is evident from Fig. 1b that for bias voltages \(V_\mathrm {0b}<420\,\mathrm {\mu V}\) no current flows irrespective of gate voltage \((V_\mathrm {g})\) and up to certain voltage \(V_\mathrm {0b}\sim 1.46\,\mathrm {mV}\) current is blocked for certain gate voltages. This is due to the gap in the superconducting quasi-particle density of states in the leads and the charging energy of the device. This Coulomb blockade creates a zone in the parameter space of the bias and gate voltage inside which no current flows and the excess charge in the island is stable, this zone is called a Coulomb diamond. Because of the superconducting gap, the diamonds corresponding to neighbor excess charge states of the island overlap and create a continuous stability region. We show two of these diamonds in Fig. 1c for zero and one excess electron in the island for a device with symmetric junctions. Notice that these diamonds are bounded by straight lines defined by

$$\begin{aligned} \Delta =\pm 2E_\mathrm {c}\left( n-n_\mathrm {g}\pm 0.5\right) \pm eV_\mathrm {b,L/R}\equiv \delta \epsilon ^\pm _\mathrm {L/R}. \end{aligned}$$
(1)

Here n is the charge state of the island, \(n_\mathrm {g}\) is the charge induced in the island by the gate voltage which relates to it as \(n_\mathrm {g}=C_\mathrm {g}V_\mathrm {g}/e\), where \(C_\mathrm {g}\) is the capacitance between the gate electrode and the island, in our device \(C_\mathrm {g}=7.28\,\mathrm {aF}\), \(V_\mathrm {b,L/R}\) is the voltage drop across one junction, if we adopt the convention that positive biasing is from left (L) to right (R) \(V_\mathrm {b,L}=\kappa _\mathrm {L}V_\mathrm {b}\) and \(V_\mathrm {b,R}=-\kappa _\mathrm {R}V_\mathrm {b}\), where \(\kappa _I\) is the ratio between the junction I capacitance and the total capacitance. In our regime of interest we assume that \(\kappa _\mathrm {L}/\kappa _\mathrm {R}=1/r\). These lines physically correspond to tunnelling thresholds that, when crossed, energetically enable a single tunnelling event into (\(+\) in Eq. (1)) or out of (− sign in Eq. (1)) the island through the left (L) or right (R) junction, changing its charge state from n to \(n\pm 1\). Notice that these lines are also well-defined inside the overlapped stability region.

The turnstile operation consists of creating a pumping trajectory that crosses these thresholds in a sequence such that in one cycle a fixed number of electrons is transported from one lead to the other. For example, crossing a line marking the threshold for a tunnelling through one junction into the island and later crossing that for a tunnelling out of the island through the other junction. This can be achieved by following the path designated as (0) in Fig. 1d which is the usual driving sequence that is implemented by applying any periodic RF waveform to the gate electrode only. If this is repeated f times per second then one electron is transported in each repetition giving rise to a current \(I=ef\) [8]. In Ref. [18] we proposed an alternative driving in which we added to the pure DC bias a periodic modulation such that we could create a parabolic trajectory with negative concavity inside the stability region. We proved that this new driving scheme also produces single-electron currents and even improves its accuracy. In the present work we apply a different driving to the SET described by

$$\begin{aligned} \begin{aligned} n_\mathrm {g}&=n_\mathrm {0g}+\dfrac{A_\mathrm {g}}{2}\sin {\left( \omega t\right) },\\ V_\mathrm {b}&=\pm \dfrac{A_\mathrm {b}}{2}\cos {\left( 2\omega t\right) }, \end{aligned} \end{aligned}$$
(2)

where \(\omega =2\pi f\), \(A_\mathrm {b}\) is the peak-to-peak (pp) amplitude of the bias signal and \(A_\mathrm {g}\) is the pp charge-normalized amplitude of the gate signal. In Eq. (2), the \(+\) sign generates the path marked as (1) in Fig. 1d and the − sign the one designated as (2). In fact, if we consider time t as a parameter, Eq. (2) verifies that \(V_\mathrm {b}=A_\mathrm {b}/2\mp 4\left( n_\mathrm {g}-n_\mathrm {0g}\right) ^2A_\mathrm {b}/A_\mathrm {g}^2\), that is, parabolas with opposite concavities. Also, \(n_\mathrm {0g}\) is set to the gate open position at \(V_\mathrm {0b}=0\), that is, \(n_\mathrm {0g}^\mathrm {open}=0.5\). Notice that the bias signal averages to zero within one driving period, there is no applied DC level. In this work, we show that in spite of this, the driving sequence of Eq. (2) can generate DC single-electron currents whose direction can be changed by switching the phase of the \(V_\mathrm {b}\) drive signal (the sign in Eq. (2)).

3 Results and Discussion

The results of this article are shown in Fig. 2. There we present the current pumped at \(f=1\,\mathrm {MHz}\) against the charge-normalized gate pp amplitude, using the driving methods described by Eq. (2). The curves for different bias pp amplitudes are shown. It is evident that the use of our driving can generate single-electron currents even though there is no DC bias applied and the bias averages to zero within a driving period. In Fig. 2a the currents generated with both protocols are shown. Notice that the current generated with protocol (1) is positive and the one generated with protocol (2) is negative, meaning that the direction of the current has been reversed just by a phase-shift of \(\pi \) of the bias signal. Furthermore, notice that these currents form plateaus across a certain interval of \(A_\mathrm {g}\) values around \(I=\pm ef\) and that they are very insensitive to changes in \(A_\mathrm {b}\) as the overlapping of the different curves corresponding to different pp bias amplitudes suggests, see Fig. 2b, c.

Fig. 2
figure 2

a Current plateaus produced with the proposed protocol at \(f=1\,\mathrm {MHz}\) against gate signal amplitude, the legend indicates the used pp bias amplitude. The curves were generated following the paths, depicted at the center of the panel, with the same Colour as the curves. b Close-up for the current flowing from left to right around \(I=ef\) indicated by the dashed line. c Close-up for the current flowing from right to left around \(I=-ef\)

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To have a deeper insight into the single-electron current generation even with zero average bias voltage, we look at the evolution of the quantities \(\delta \epsilon ^\pm _\mathrm {L/R}\), see Fig. 3. First, we need to understand why no current flows when \(V_\mathrm {0b}=0\) and no modulation is applied to the bias. Notice from Eq. (1) and from the black solid lines Fig. 3a–b that, in this case, \(\delta \epsilon ^+_\mathrm {L}=\delta \epsilon ^+_\mathrm {R}\) and \(\delta \epsilon ^-_\mathrm {L}=\delta \epsilon ^-_\mathrm {R}\), which means that the thresholds for tunnelling through both junctions are crossed simultaneously, no matter whether it is for tunnelling into or out of the island. This means that an electron is energetically allowed to tunnel through either junction into the island at one instance of the driving period and to tunnel out of the island also through either junction later. Since tunnelling is stochastic, there are nonzero probabilities of tunnelling through both junctions, but these events will be more frequent through the most transparent one [17]. However, when averaging over many periods, as is done in our measurements, all these events cancel each other out resulting in zero net current. In contrast, when a modulation is applied to the bias, the balance between the tunnelling events through both junctions is lost and, as can be seen from the red and blue solid lines in Fig. 3, \(\delta \epsilon ^+_\mathrm {L}\ne \delta \epsilon ^+_\mathrm {R}\) and \(\delta \epsilon ^-_\mathrm {L}\ne \delta \epsilon ^-_\mathrm {R}\). For path (1) we get that \(\delta \epsilon ^+_\mathrm {L}=\Delta \) before \(\delta \epsilon ^+_\mathrm {R}=\Delta \) with a time difference \(\delta t\) and that \(\delta \epsilon ^-_\mathrm {R}=\Delta \) before \(\delta \epsilon ^-_\mathrm {L}=\Delta \) with a different time interval, see Fig. 3a, b. Hence, if the shortest time delay is long enough compared to the tunnelling time, as is the case for \(f=1\,\mathrm {MHz}\), then a DC single-electron current flows from left to right. In the case of path (2), \(\delta \epsilon ^+_\mathrm {R}=\Delta \) before \(\delta \epsilon ^+_\mathrm {L}=\Delta \) and \(\delta \epsilon ^-_\mathrm {L}=\Delta \) before \(\delta \epsilon ^-_\mathrm {R}=\Delta \), see Fig. 3c, d, generating then a DC current flowing from right to left.

Fig. 3
figure 3

Evolution within one driving period of the energy differences \(\delta \epsilon ^\pm _\mathrm {L/R}\) for tunnelling events a out of the island with driving along path (1). b Into the island using protocol (1). c Out of the island following path (2). d Into the island using protocol (2). The evolution using protocol (0) with \(V_\mathrm {0b}=0\) is depicted as black solid lines in all panels correspondingly, for comparison. The legend indicates which junction is considered

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The additional features seen on the current curves of Fig. 2a can be explained in terms of the previous description. For example, the kinks that appear at low \(A_\mathrm {g}\) with the direction opposite to the current plateau appear because at low amplitudes the path crosses the thresholds in the sequence required for generating this current. As \(A_\mathrm {b}\) grows, the \(A_\mathrm {g}\) interval for this kink narrows as can be deduced from tracing these driving paths in the diagram of Fig. 1c. Also, the shape of these structures is affected by the asymmetry of the junctions, that is, the value of r. We would like to remark that the limitations to operation of SINIS single-electron turnstile in the RF regime are the same as for the usual DC biased one, namely the charging energy must exceed the thermal energy and the tunnelling resistance must be larger than the resistance quantum. We want to stress that even though the bias DC level is zero, one can engineer many more driving paths with different waveforms such that the thresholds are crossed in a sequence that enables single-electron current generation by applying an appropriate RF signal to the bias.

4 Conclusions

In summary, we have successfully and for the first time, generated single-electron currents in a SINIS SET with zero average bias. We achieve this by applying a periodic modulation to the source electrode of the device in addition to the conventional gate drive. This allows to break the balance that exists between the energy cost of tunnelling through either junction when the DC bias is zero and no modulation is applied. This novel operation regime shows robustness in current accuracy compared to \(|I|=ef\) across different bias modulation amplitudes. Remarkably, this driving allows a current reversal just by shifting the biasing signal phase by \(\pi \). The results are explained in terms of which energy threshold is crossed first, this is readily tuned by the phase of the bias RF signal.