Skip to main content
Log in

Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors

  • Published:
Journal of Low Temperature Physics Aims and scope Submit manuscript

Abstract

We are developing low power cryogenic readout integrated circuits (ROICs) for large format far-infrared image sensors using fully-depleted-silicon-on-insulator (FD-SOI) CMOS technology. We have evaluated the characteristics of MOS FETs fabricated by the FD-SOI CMOS technology and have found that both p-ch and n-ch FETs show good static performance below the liquid helium temperature, where n-ch FETs fabricated by conventional bulk-CMOS technology usually suffer from anomalous behaviors such as kink and hysteresis. We have also designed and fabricated an operational amplifier (OP-AMP) and have successfully demonstrated that the OP-AMP works at the liquid helium temperature with an open loop gain of 7000 and a power consumption of 1.3 μW. The noise is dominated by mainly 1/f and has a value of at 1 Hz.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5

Similar content being viewed by others

References

  1. G.H. Rieke et al., Astrophys. J. 154, 25 (2004)

    Article  Google Scholar 

  2. M. Kawada et al., Publ. Astron. Soc. Jpn. 59, S389 (2007)

    ADS  Google Scholar 

  3. A. Poglitsch et al., Astron. Astrophys. 518, L2 (2010)

    Article  ADS  Google Scholar 

  4. E.Y. Young et al., Proc. SPIE 3354, 57 (1998)

    Article  ADS  Google Scholar 

  5. H. Nagata et al., IEEE Trans. Electron Devices 51, 270 (2004)

    Article  ADS  Google Scholar 

  6. P. Merken et al., Proc. SPIE 6275, 627516 (2006)

    Article  Google Scholar 

  7. T. Nakagawa, Proc. SPIE 7731, 77310O (2010)

    Article  ADS  Google Scholar 

  8. H. Sugita, Cryogenics 50, 566 (2010)

    Article  ADS  Google Scholar 

  9. H. Kaneda et al., Jpn. J. Appl. Phys. 50, 066503 (2011)

    Article  ADS  Google Scholar 

  10. J.-P. Colinge, IEEE Electron Device Lett. 9, 97 (1988)

    Article  ADS  Google Scholar 

  11. A. Uchiyama et al., in IEEE International SOI Conference Proceedings, vol. 2006 (2006), p. 15

    Chapter  Google Scholar 

  12. Y. Arai et al., Nucl. Instrum. Methods 636(1), S31–S36 (2010)

    Google Scholar 

  13. H. Nagata et al., AIP Conf. Proc. 1185, 267 (2009)

    ADS  Google Scholar 

  14. H. Nagata et al., IEICE Trans. Commun. E94-B, 2952 (2011)

    Article  ADS  Google Scholar 

  15. M.G. Hauser, AIP Conf. Proc. 348, 11 (1996)

    Article  ADS  Google Scholar 

  16. M. Fujiwara et al., Appl. Opt. 42, 2166 (2003)

    Article  ADS  Google Scholar 

Download references

Acknowledgements

This work was supported by KAKENHI (21760321, 23340053, 20244016).

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to T. Wada.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Wada, T., Nagata, H., Ikeda, H. et al. Development of Low Power Cryogenic Readout Integrated Circuits Using Fully-Depleted-Silicon-on-Insulator CMOS Technology for Far-Infrared Image Sensors. J Low Temp Phys 167, 602–608 (2012). https://doi.org/10.1007/s10909-012-0461-6

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10909-012-0461-6

Keywords

Navigation