Skip to main content

The Role of the Gate Geometry for Cryogenic HEMTs: Towards an Input Voltage Noise Below \(0.5~\mathrm{nV}/\sqrt{\mathrm{Hz}}\) at 1 kHz and 4.2 K


Specific HEMTs (High Electron Mobility Transistors) with different gate geometries have been realized on the same AlGaAs/GaAs heterojunction. Under the same operating conditions with a power consumption of 30 μW, experimental results at 4.2 K and low frequency range show that the input voltage noise is almost inversely proportional to the square root of the input capacitance: a noise value as low as \(0.46~\mathrm{nV}/\sqrt{\mathrm{Hz}}\) at 1 kHz has been obtained with an input capacitance of about 100 pF.

This is a preview of subscription content, access via your institution.

Fig. 1
Fig. 2
Fig. 3


  1. F. Ayela, J.L. Bret, J. Chaussy, Rev. Sci. Instrum. 62, 2816 (1991)

    Article  ADS  Google Scholar 

  2. D.V. Camin, C.F. Colombo, V. Grassi, J. Phys., IV 12(3), 37 (2002)

    Google Scholar 

  3. E. Gremion, D. Niepce, A. Cavanna, U. Gennser, Y. Jin, Appl. Phys. Lett. 97, 233505 (2010)

    Article  ADS  Google Scholar 

  4. N. Oukhanski, M. Grajcar, E. Il’ichev, H.-G. Meyer, Rev. Sci. Instrum. 74, 1145 (2003)

    Article  ADS  Google Scholar 

  5. A.M. Robinson, V.I. Talyanskii, Rev. Sci. Instrum. 75, 3169 (2004)

    Article  ADS  Google Scholar 

  6. R. Plana, L. Escotte, O. Llopis, H. Amine, T. Parra, M. Gayral, J. Graffeuil, IEEE Trans. Electron Devices 40, 852 (1993)

    Article  ADS  Google Scholar 

  7. F.N. Hooge, Phys. Lett. 29A, 139 (1969)

    ADS  Google Scholar 

  8. T. Lucas, Y. Jin, J. Phys., IV 12(3), 113 (2002)

    Google Scholar 

  9. To be published

Download references


This work was supported in part by the Réseau RENATECH, “le RTRA Triangle de la Physique” grants No. 2008-015T and No. 2009-004T and European FP7 grant No. 263455. Q.D. is funded by the BDI CNRS/CEA. We acknowledge stimulating discussions with H. Bouchiat, D.C. Glattli, C. Pigot, F. Pierre and A. Anthore. We thank E. Cambril and L. Couraud for technical help.

Author information

Authors and Affiliations


Corresponding author

Correspondence to Y. Jin.

Rights and permissions

Reprints and Permissions

About this article

Cite this article

Dong, Q., Liang, Y.X., Gennser, U. et al. The Role of the Gate Geometry for Cryogenic HEMTs: Towards an Input Voltage Noise Below \(0.5~\mathrm{nV}/\sqrt{\mathrm{Hz}}\) at 1 kHz and 4.2 K. J Low Temp Phys 167, 626–631 (2012).

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI:


  • Low temperature
  • Low frequency noise
  • Low power
  • Transistor
  • Field-effect transistor
  • HEMT
  • Cryoelectronics