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An insulated gate bipolar transistor with three-layer poly gate for improved figure of merit

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Abstract

In this study, an insulated gate bipolar transistor (IGBT) with three-layer poly gate is proposed and investigated by TCAD simulation. Here, gate is spilt in two different workfunction materials of N+ poly (\(\phi _{g}\)= 4.17 eV) and P+ poly (\(\phi _{g}\)= 5.25 eV). Lower workfunction poly layer is sandwiched between higher workfunction poly, connected via a single metal. The gate oxide thickness is varied in x-direction. This leads to improvement in transconductance and reduction in miller capacitance. Thin oxide near the emitter serves good control over the charge carriers in the channel. This deployment of dual material gate in proposed device results in 36% reduction in area-specific on-resistance without any degradation in breakdown voltage. In addition to this, proposed device exhibits improved transient characteristics with 18.5% and 60% reduction in turn-off time and delay, respectively, as compared to conventional device. Further, the turn-off energy loss is reduced by 23.5% and 29.09% reduction in on-state voltage drop is achieved. Furthermore, proposed device offers 23%, 58%, and 30% improvement in FOM1, Baliga figure of merit (BFOM), and FOM2, respectively.

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Correspondence to Namrata Gupta.

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Gupta, N., Singh, S. & Naugarhiya, A. An insulated gate bipolar transistor with three-layer poly gate for improved figure of merit. J Mater Sci: Mater Electron 31, 15513–15521 (2020). https://doi.org/10.1007/s10854-020-04113-z

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  • DOI: https://doi.org/10.1007/s10854-020-04113-z

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