Flip-chip assembly: is the bi-material model acceptable?
- 63 Downloads
The bonding layer in flip-chip assembly designs is characterized, unlike in epoxy bonded assemblies, by a relatively high effective Young’s modulus of its composite material, which is comprised of high-modulus solder and low-modulus epoxy encapsulant (underfill). Simple, easy-to-use and physically meaningful tri- and bi-material analytical stress models are developed for the evaluation of the thermally induced interfacial shearing stresses, as well as normal stresses acting in the cross-sections of the assembly components. While in a tri-material model all the three materials, the chip, the substrate and the bonding layer, are treated as “equal partners”, in a bi-material model a significant simplification is made, assuming that the bonding layer is much thinner than the bonded components, the chip and the substrate, and/or that its effective Young’s modulus is significantly lower than the moduli of the chip and the substrate materials. In the carried out numerical example based on the application of the tri-material model, the highest shearing stress occurs at the chip-bond interface and is significantly, by the factor of about 2.45, higher than the stress at the substrate-bond interface, but even the latter stress is about twice as high as the maximum shearing stress predicted on the basis of the bi-material model. As to the normal stresses acting in the cross-sections of the assembly components, the tri-material model predicts that the highest stresses occur in the chip, the lowest—in the substrate, and that the stresses in the bond are rather high, about 59% of the stresses in the chip. The bi-material model, however, simply assumes that the normal stresses in the bond are zero. The normal stresses in the chip predicted on the basis of this model are only about 78% of the stress predicted by the tri-material model. The normal stresses in the substrate evaluated on the basis of the bi-material model are almost twice as high as the tri-material model predicts, but these stresses are low anyway: it is the state of stress in the chip and in the bonding layer, and the interfacial stress at the chip-bond interface that should be of the primary concern to the device designer. It is concluded that while a simple bi-material model can be successfully used for adhesively bonded assemblies, characterized by a thin and/or low modulus bonding layer, a tri-material model should be employed for flip-chip assemblies, when high-modulus solders are used. Future work should include finite-element analyses and experimental evaluations.
- 1.E. Suhir, Avoiding low-cycle fatigue in solder material using inhomogeneous column-grid-array (CGA) design. ChipScale Rev. March–April 2016Google Scholar
- 3.S.C. Machuga, S.E. Lindsey, K.D. Moore, A.F. Skipor, Encapsulant of flip-chip structures. Proceedings of IEEE/CHMT International Electronic Manufacturing and Technology Symposium, Baltimore, MD, 1992, pp. 53–58Google Scholar
- 4.C.P. Yeh, W.X. Zhou, K. Wyatt, Parametric finite-element analysis of flip-chip structures. Int. J. Microcircuits Electron. Packag. 19, 120–127 (1996)Google Scholar
- 5.D.W. Peterson, J.N. Sweet, S.N. Burchett, A. Hsia, Stresses from flip-chip assembly and underfill; measurements with ATC 4.1 assembly test chip and analysis by finite element method. Proceedings of 47th Electronic Components and Technology Conference, San Jose, CA, 1997, pp. 134–143Google Scholar
- 6.J.H. Zhao, X. Dai, P.S. Ho, Analysis and modeling verification for thermal-mechanical deformation in flip-chip packages. Proceedings of 48th Electronic Components and Technology Conference, Seattle, WA, 1998, pp. 336–344Google Scholar
- 10.C.E. Hanna, S.K. Sitaraman, Role of underfill materials and thermal cycling on die stresses. Proc. InterPACK 99., Hawaii. 26–1, 795–801 (1999)Google Scholar