Assessed interfacial strength and elastic moduli of the bonding material from shear-off test data

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Abstract

A simple and physically meaningful analytical stress model is developed in application to shear-off testing with an objective to evaluate the interfacial shearing stress in the bonding material from the measured shear off force. The model can be used also for the evaluation of the shear modulus of the bonding material, if the interfacial displacement is also measured. The general concept is illustrated by a numerical example. In the authors’ opinion, the suggested methodology, based on the concept of the interfacial compliance, suggested by the first author in his 1986 ASME J. Appl. Mech. paper, could become a basis for a new effective experimental method for assessing the interfacial shearing strength and elastic moduli of the bonding material in electronics. The methodology can be used particularly in application to the recently suggested sintered silver bonding materials to evaluate their bonding strength from the measured force-at-failure and shear modulus from the measured shearing force and displacement.

Keywords

Interfacial Shearing Stress Bonding Layer Bonding Material Ball Bond Interfacial Displacement 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    M. Klein, B. Wiens, M. Hutter, H. Oppermann, R. Aschenbrenner, H. Reichl, Behaviour of platinum as UBM in flip chip solder joints. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 40–45Google Scholar
  2. 2.
    R.H. Uang, K.C. Chen, S.W. Lu, H.T. Hu, S.H. Huang, The reliability performance of low cost bumping on aluminum and copper wafer. In Proceedings of the 3rd Electronics Packaging Technology Conference (EPTC 2000), Singapore, 5–7 December 2000, pp. 292–296Google Scholar
  3. 3.
    R.J. Coyle, P.P. Solan, A.J. Serafino, S.A. Gahr, The influence of room temperature aging on ball shear strength and microstructure of area array solder balls. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 160–169Google Scholar
  4. 4.
    K.M. Levis, A. Mawer, Assembly and solder joint reliability of plastic ball grid array with lead-free versus lead–tin interconnect. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 1198–1204Google Scholar
  5. 5.
    Y. Tomita, Q. Wu, A. Maeda, S. Baba, N. Ueda, Advanced surface plating on the organic FC-BGA package. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 861–867Google Scholar
  6. 6.
    I.S. Kang, J.H. Kim, I.S. Park, K.R. Hur, S.J. Cho, H. Han, J. Yu, The solder joint and runner metal reliability of wafer-level CSP (omega-CSP). In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 87–92Google Scholar
  7. 7.
    S.-W.R. Lee, C.C. Yan, Z. Karim, X. Huang, Assessment on the effect of electroless nickel plating on the reliability of solder ball attachment to the bond pads of PBGA substrate. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 868–873Google Scholar
  8. 8.
    C.K. Shin, J.Y. Huh, Effect of Cu-containing solders on the critical IMC thickness for the shear strength of BGA solder joints. In Proceedings of the 3rd Electronics Packaging Technology Conference (EPTC 2000), Singapore, 5–7 December 2000, pp. 406–411Google Scholar
  9. 9.
    S.Y. Jang, K.W. Paik, Comparison of electroplated eutectic Sn/Bi and Pb/Sn solder bumps on various UBM systems. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 64–68Google Scholar
  10. 10.
    S.J. Cho, J.Y. Kim, M.G. Park, I.S. Park, H.S. Chun, Under bump metallurgies for a wafer level CSP with eutectic Pb–Sn solder ball. In Proceedings of the 50th ECTC, Nevada, 21–24 May 2000, pp. 844–849Google Scholar
  11. 11.
    S.-W.R. Lee, K. Newman, L. Hu, Thermal fatigue analysis of PBGA solder joints with the consideration of damage evolution. In Packaging of Electronic and Photonic Devices, EEP, vol. 28, Florida, 5–10 November 2000, pp. 207–212Google Scholar
  12. 12.
    D. Vogel, R. Kiihnert, M. Dost, B. Michel, Determination of packaging material properties utilizing image correlation techniques. J. Electron. Packag. 124, 345–351 (2002)CrossRefGoogle Scholar
  13. 13.
    A. Schubert, R. Dudek, E. Auerswald, A. Gollhardt, B. Michel, H. Reichl, Fatigue life models for SnAgCu and SnPb solder joints evaluated by experiments and simulation. In 53rd ECTC, 2003, pp. 603–610Google Scholar
  14. 14.
    R. Dudek, W. Faust, J. Vogel, B. Michel, In-situ solder fatigue studies using a thermal lap shear test. In Proceedings of International Conference on Electronics Packaging Technology, 2004, pp. 396–403Google Scholar
  15. 15.
    R. Dudek, H. Walter, R. Doring, B. Michel, Thermal fatigue modelling for SnAgCu and SnPb solder joints. In Proceedings of EuroSimE 2004, Brussels, Belgium, 2004, pp. 557–564Google Scholar
  16. 16.
    A. Wymysłowski, B. Bober, Ł. Dowhań, T. Fałat, J. Felba, K. Małecki, P. Matkowski, K. Urbański, Z. Żaluk, Shearing tests for solder joints reliability assessment. In XXXI International Conference of IMAPS Poland Chapter, Rzeszów-Krasiczyn, Poland, 23–26 September 2007Google Scholar
  17. 17.
    J. Lau (ed.), Solder Joint Reliability: Theory and Applications (Van Nostrand Reinhold, New York, 1990)Google Scholar
  18. 18.
    W. Engelmaier, Reliability for surface mount solder joints: physics and statistics of failure. In Proceedings of the Surface Mount International, vol. 1, San Jose, CA, August 1992, p. 433Google Scholar
  19. 19.
    E. Suhir, Stresses in bi-metal thermostats. ASME J. Appl. Mech. 53(3), 657–660 (1986)Google Scholar
  20. 20.
    E. Suhir, Interfacial stresses in bi-metal thermostats. ASME J. Appl. Mech. 56(3), 595–600 (1989)Google Scholar
  21. 21.
    A.Y. Kuo, Thermal stress at the edge of a bi-metallic thermostat. ASME J. Appl. Mech. 57, 354–358 (1990)CrossRefGoogle Scholar
  22. 22.
    C. Caswell, Manufacturing and reliability challenges with QFN. In IMAPS Conference, Atlantic City, NJ, June 2010Google Scholar
  23. 23.
    E. Suhir, Thermal stress in a bi-material assembly adhesively bonded at the ends. J. Appl. Phys. 89(1), 120–129 (2001)CrossRefGoogle Scholar
  24. 24.
    E. Suhir, Thermal stress in an adhesively bonded joint with a low modulus adhesive layer at the ends. J. Appl. Phys. 93, 3657–3661 (2003)CrossRefGoogle Scholar
  25. 25.
    E. Suhir, Interfacial thermal stresses in a bi-material assembly with a low-yield-stress bonding layer. Model. Simul. Mater. Sci. Eng. 14, 1015–1030 (2006)CrossRefGoogle Scholar
  26. 26.
    E. Suhir, On a paradoxical situation related to bonded joints: Could stiffer mid-portions of a compliant attachment result in lower thermal stress?. JSME J. Solid Mech. Mater. Eng. 3(7), 990–997 (2009)CrossRefGoogle Scholar
  27. 27.
    E. Suhir, Thermal stress in a bi-material assembly with a ‘Piecewise-Continuous’ bonding layer: theorem of three axial forces. J. Phys. D 42, 363–376 (2009)Google Scholar
  28. 28.
    E. Suhir, L. Bechou, B. Levrier, Predicted size of an inelastic zone in a ball-grid-array assembly. ASME J. Appl. Mech. 80, 021007 (2013)CrossRefGoogle Scholar
  29. 29.
    E. Suhir, Avoiding low-cycle fatigue in solder material using inhomogeneous column-grid-array (CGA) design. Chip Scale Rev. March–April (2016)Google Scholar
  30. 30.
    H. Schwarzbauer, Method of securing electronic components to a substrate. US Patent 4,810,672, 7 March 1989Google Scholar
  31. 31.
    H. Schwarzbauer, R. Kuhnert, Novel large area joining technique for improved power device performance. IEEE Trans. Ind. Appl. 27(1), 93–95 (1991)CrossRefGoogle Scholar
  32. 32.
    C. Mertens, R. Sittig, Low temperature joining technique for improved reliability. In International Conference on Integrated Power Electronic Systems, Chips 2002, Bremen, Germany, 2002Google Scholar
  33. 33.
    G. Bai, Low-temperature sintering of nanoscale silver paste for semiconductor device interconnection, PhD Dissertation, Virginia Polytechnic Institute and State University, Blacksburg, October 2005Google Scholar
  34. 34.
    C. Göbl, P. Beckedahl, H. Braml, Low temperature sinter technology: die attachment for automotive power electronic applications. In Automotive Power Electronics, Paris, 21–22 June 2006, p. 5Google Scholar
  35. 35.
    T. Wang, X. Chen, G.-Q. Lu, G.-Y. Lei, Low-temperature sintering with nano-silver paste in die-attached interconnection. J. Electron. Mater. 36(10), 1333–1340 (2007)CrossRefGoogle Scholar
  36. 36.
    N. Lubick, Nanosilver toxicity: ions, nanoparticles or both? Environ. Sci. Technol. 42(23), 8617–8617 (2008)CrossRefGoogle Scholar
  37. 37.
    P.O. Quintero, T. Oberc, F.P. McCluskey, High temperature die attach by transient liquid phase sintering. In HiTEC 2008 (IMAPS, Albuquerque, 2008), pp. 207–212. http://scholar.lib.vt.edu/theses/available/etd-10312005-163634/unrestricted/Dissertation-GBai05.pdf
  38. 38.
    M.H. Poech, M. Weiss, K. Gruber, Chip drop after silver sintering process. In COMSOL Proceedings, Milan, 2009Google Scholar
  39. 39.
    B. McPherson, J.M. Hornberger, J. Bourne, A.B. Lostetter, R.M. Schupbach, R. Shaw, B. Reese, B. Rowden, H.A. Mantooth, S. Ang, J.C. Balda, K. Okumura, T. Otsuka, Packaging of high-temperature 50 kW SiC motor drive module for hybrid electric vehicles. Adv. Microelectron. 37(1), 20–26 (2010)Google Scholar
  40. 40.
    H.A. Mantooth, S. Ang, J.C. Balda, K. Okumura, T. Otsuka, Packaging of high temperature 50 kW SiC motor drive module for hybrid-electric vehicles. Adv. Microelectron. 37(1), 20–26 (2010)Google Scholar
  41. 41.
    D. Wakuda, K.-S. Kim, K. Suganuma, Ag nanoparticle paste synthesis for room temperature bonding. IEEE CPMT Trans. 33(1), 1–6 (2010)Google Scholar
  42. 42.
    T.G. Lei, J.N. Calata, G.-Q. Lu, X. Chen, S. Luo, Low-temperature sintering of nanoscale silver paste for attaching large-area (>100 mm2) chips. IEEE CPMT Trans. 33(1), 98–104 (2010)Google Scholar
  43. 43.
    M. Wrosch, A. Soriano, Sintered conductive adhesives for high temperature packaging. In 2010 ECTC Google Scholar
  44. 44.
    V. Manikam, K.Y. Cheong, Die attach materials for high temperature applications: a review. CPMT Trans. 1(4), 457–478 (2011)Google Scholar
  45. 45.
    C. Buttay, A. Masson, J. Li, M. Johnson, M. Lazar, C. Raynoud, H. Morel, Die Attach of Power Devices Using Silver Sintering—Bonding Process Optimization and Characterization (VDE Verlag GMBH, Berlin, 2012)Google Scholar
  46. 46.
    S. Kraft, A. Schletz, M. Maertz, Reliability of silver sintering on DBC and DBA substrates for power electronic applications. In CIPS 2012, Nuremberg, Germany, 6–8 March 2012Google Scholar
  47. 47.
    H. Jin, S. Kanagavel, W.-F. Chin, Novel conductive paste using hybrid silver sintering technology for high reliability power semiconductor packaging. In 2014 ECTC Google Scholar

Copyright information

© Springer Science+Business Media New York 2017

Authors and Affiliations

  1. 1.Portland State UniversityPortlandUSA
  2. 2.ERS Co.Los AltosUSA
  3. 3.Jet Propulsion LaboratoryCalifornia Institute of TechnologyPasadenaUSA
  4. 4.Department of Electronic MaterialsTechnical UniversityViennaAustria

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