Abstract
Although there exist promising ways to avoid inelastic strains in solder joints of the second level interconnections in IC package designs, it still appears more typical than not that the peripheral joints of a package/PCB assembly experience inelastic strains. This takes place at low temperature conditions, when the deviation from the high fabrication temperature is the largest and the induced thermal stresses are the highest. On the other hand, it is well known that it is the combination of low temperatures and repetitive dynamic loading that accelerate dramatically the propagation of fatigue cracks, whether elastic or inelastic. Accordingly, a modification of the recently suggested Boltzmann–Arrhenius–Zhurkov model is developed for the evaluation of the remaining useful lifetime of the second level solder joint interconnection whose peripheral joints experience inelastic strains. The experimental basis of the approach is the highly focused and highly cost-effective failure-oriented-accelerated-testing (FOAT). The FOAT specimens are subjected in our methodology to the combined action of low temperatures (not to elevated temperatures, as in the classical Arrhenius model) and random vibrations with the given input energy spectrum. The suggested methodology is viewed as a possible, effective and attractive alternative to temperature cycling. As long as inelastic deformations take place, it is assumed that it is these deformations that determine the fatigue lifetime of the solder material, and the state of stress in the elastic mid-portion of the assembly does not have to be accounted for. The roles of the size and stiffness of this mid-portion have to be considered, however, when determining the very existence and establishing the size of the inelastic zones at the peripheral portions of the designs. The general concept is illustrated by a numerical example. Although this example is carried out for a ball-grid-array design, it is applicable to highly popular column-grid-array (CGA) and quad-flat-no-lead (QFN) designs as well. It is noteworthy that it is much easier to avoid inelastic strains in CGA and QFN structures than in the addressed BGA design. The random vibrations are considered in the developed methodology as a white noise of the given (m/s2)2/Hz—the ratio of the acceleration amplitudes squared to the vibration frequency.
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Suhir, E., Ghaffarian, R. & Yi, S. Solder material experiencing low temperature inelastic stress and random vibration loading: predicted remaining useful lifetime. J Mater Sci: Mater Electron 28, 3585–3597 (2017). https://doi.org/10.1007/s10854-016-5960-9
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DOI: https://doi.org/10.1007/s10854-016-5960-9