Journal of Materials Science: Materials in Electronics

, Volume 27, Issue 11, pp 11572–11582 | Cite as

Column-grid-array (CGA) versus ball-grid-array (BGA): board-level drop test and the expected dynamic stress in the solder material

  • E. SuhirEmail author
  • R. Ghaffarian


Board level drop test is considered with an objective to develop a physically meaningful analytical predictive model for the evaluation of the expected impact-induced dynamic stresses in the solder material. Ball-grid-array (BGA) and column-grid-array (CGA) designs are addressed. Intuitively it is felt that while the application of the CGA technology to relieve thermal stresses in the solder material might be quite effective (owing to the greater interfacial compliance of the CGA in comparison with the BGA), the situation might be quite different when the PCB/package experiences dynamic loading. This is because the mass of the CGA joints exceeds considerably that of the BGA interconnections and the corresponding inertia forces might be substantially larger in the case of a CGA design. The numerical example carried out for rather arbitrary, but realistic, input data has indicated that the dynamic stresses in the solder material of the CGA design are even higher than the stresses in the BGA interconnections. This means particularly that the physically meaningful drop height in board-level tests should be thoroughly selected and that this height should be different, for BGA and CGA designs.


Solder Joint Flexural Rigidity Interfacial Shearing Stress Bonding Layer Solder Material 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    E. Suhir, Stresses in bi-metal thermostats. ASME J. Appl. Mech. 53(3), 657–660 (1986)CrossRefGoogle Scholar
  2. 2.
    E. Suhir, Calculated thermally induced stresses in adhesively bonded and soldered assemblies, in Proceedings of the International Symposium on Microelectronics, ISHM, 1986, Atlanta, Georgia (1986)Google Scholar
  3. 3.
    E. Suhir, Interfacial stresses in bi-metal thermostats. ASME J. Appl. Mech. 56(3), 595–600 (1989)CrossRefGoogle Scholar
  4. 4.
    E. Suhir, Thermal stress failures in microelectronics and photonics: prediction and prevention. Future Circuits Int. 5, 83–89 (1999)Google Scholar
  5. 5.
    Z. Kovac et al., Compliant Interface for Semiconductor Chip and Method Therefor, US Patent #6,133,639 (2000)Google Scholar
  6. 6.
    T.H. DiStefano et al., Compliant Microelectronic Mounting Device, US Patent #6,370,032 (2002)Google Scholar
  7. 7.
    Z. Kovac et al., Methods for Making Electronic Assemblies Including Compliant Interfaces, US Patent #6,525,429 (2003)Google Scholar
  8. 8.
    E. Suhir, Thermal stress in an adhesively bonded joint with a low modulus adhesive layer at the ends. Appl. Phys. J. (2003)Google Scholar
  9. 9.
    E. Paterson et al., Mechanical Highly Compliant Thermal Interface Pad, US Patent #6,910,271 (2005)Google Scholar
  10. 10.
    Z. Kovac et al., Methods of Making Microelectronic Assemblies Including Compliant Interfaces, US Patent #6,870,272 (2005)Google Scholar
  11. 11.
    E. Suhir, M. Vujosevic, Interfacial stresses in a bi-material assembly with a compliant bonding layer. J. Phys. D: Appl. Phys. 41(11), 115504 (2008). doi: 10.1088/0022-3727/41/11/115504 CrossRefGoogle Scholar
  12. 12.
    S.P. Timoshenko, Strength of Materials, 3rd edn. (Van Nostrand Company Inc, Princeton, NJ, 1955)Google Scholar
  13. 13.
    E. Suhir, Structural Analysis in Microelectronic and Fiber Optic Systems (Van-Nostrand, New York, 1991)CrossRefGoogle Scholar
  14. 14.
    E. Suhir, R. Ghaffarian, J. Nicolics, Could thermal stresses in a BGA/CGA-system be evaluated from a model intended for a homogeneously bonded assembly? J. Mater. Sci.: Mater. Electron. 27(1), 570–579 (2016). doi: 10.1007/s10854-015-3790-9
  15. 15.
    E. Suhir, R. Ghaffarian, Board level drop test: exact solution to the problem of the nonlinear dynamic response of a PCB to the drop impact. J. Mater. Sci.: Mater. Electron. (2016). doi: 10.1007/s10854-016-4988-1 Google Scholar
  16. 16.
    V. Mishkevich, E. Suhir, Simplified approach to the evaluation of thermally induced stresses in bi-material structures, in Structural Analysis in Microelectronics and Fiber Optics, ed. by E. Suhir (ASME Press, New York, 1993)Google Scholar

Copyright information

© Springer Science+Business Media New York 2016

Authors and Affiliations

  1. 1.Portland State UniversityPortlandUSA
  2. 2.ERS Co.Los AltosUSA
  3. 3.Jet Propulsion LaboratoryCalifornia Institute of TechnologyPasadenaUSA

Personalised recommendations