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Carrier lifetime analysis in thin gate oxide FD-SOI n-MOSFETs by gate-induced drain current transients

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Abstract

The drain current (ID) transients by switching the biasing condition are examined in FD-SOI MOSFETs with negative biased back gate voltage (VBG). Special attention is paid to the influence of the gate-induced charge/discharge of the floating body on the ID transient. The ID transient appears not only by switching the front gate voltage (VFG) but also by switching VBG. It is also shown that the analysis of a small VFG step transient is useful to examine the lifetime under different bias conditions. All the results can be explained by the transitional change of ID − VFG characteristics at different body-charge conditions.

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Acknowledgement

This work was partially supported by the Ministry of Education, Culture, Sports, Science and Technology of Japan for Young Scientists (B) 16760051, 2006.

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Authors and Affiliations

  1. Kumamoto National College of Technology, 2569-2 Nishigoshi, Kumamoto, 861-1102, Japan

    K. Hayama, K. Takakura & H. Ohyama

  2. Institut de Microelectrònica de Barcelona (CNM-CSIC), Campus UAB, 08193, Bellaterra, Spain

    J. M. Rafí

  3. IMEC, Kapeldreef 75, 3001, Leuven, Belgium

    A. Mercha, E. Simoen & C. Claeys

  4. Electrical Engineering Department, KU Leuven, Leuven, Belgium

    C. Claeys

Authors
  1. K. Hayama
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  2. K. Takakura
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  3. H. Ohyama
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  4. J. M. Rafí
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  5. A. Mercha
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  6. E. Simoen
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  7. C. Claeys
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Correspondence to K. Hayama.

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Hayama, K., Takakura, K., Ohyama, H. et al. Carrier lifetime analysis in thin gate oxide FD-SOI n-MOSFETs by gate-induced drain current transients. J Mater Sci: Mater Electron 19, 161–165 (2008). https://doi.org/10.1007/s10854-007-9301-x

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  • DOI: https://doi.org/10.1007/s10854-007-9301-x

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