Skip to main content
SpringerLink
Log in

A Test Platform for Dependability Analysis of SoCs Exposed to EMI and Radiation

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

With the IEC 62.132 proposal, the roadmap for standardization of Electromagnetic (EM) immunity measurement methods has reached a high degree of success. The same understanding can be taken from the MIL-STD-883 H for Total Ionizing Dose (TID) radiation. However, no effort has been made to measure the behavior of electronics operating under the combined effects of both, EM noise and TID radiation. For the reasons pointed out, the combined-effect measurements should be mandatory when dealing with Systems-on-Chip (SoCs) devoted to critical applications. In this paper, we present a configurable platform devoted to perform combined tests of EM immunity and TID radiation of SoCs according to the international standards.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 14

Similar content being viewed by others

Notes

  1. The Plasma microprocessor is a Von Neumann 32-bit RISC architecture that can be downloaded from the public domain www.opencores.org. The Plasma is implemented in VHDL and has, with exception of the load/store instruction, an instruction set compatible to the MIPS architecture.

  2. The Plasma’s RTOS adopts the preemptive scheduling algorithm with priority support and provides a basic mechanism able to detect faults that cause misbehavior of the RTOS’s essential services, such as stack overflow and timing violations. This mechanism is implemented by a function named assert(), which is called every time a RTOS service is run. When the argument of the assert() function is false, the RTOS sends an error message through the standard output. Therefore, more RTOS services are solicited by a given application program, higher is RTOS capability to detect faults.

  3. It should be noted that as postulated in the literature [15], the accumulated radiation (TID) on ICs has as consequence the reduction of the MOS transistor threshold voltage (Vth). This phenomenon gradually reduces the (IDS) current drive capability of pMOS transistors and increases the one for nMOS devices. From this, the IC is more prone to suffer from timing (delay) faults.

References

  1. Argyrides C, Chipana RD, Vargas F, Pradhan DK (2011) “Reliability Analysis of H-Tree RAM Memories Implemented with BICS and Parity Codes for Multiple-Bit Upset Correction”, IEEE Transactions on Reliability, Issue 99

  2. Ben Dia S, Ramdani R, Sicard E (2006) Electromagnetic compatibility of integrated circuits – Techniques for low emission and susceptibility, Springer

  3. Cochran DJ, Buchner SP, Sanders AB, LaBel KA, Carts MA, Poivey CF, Oldham TR, Ladbury RL, O’Bryan MV, Mackey SR (2008) Compendium of Recent Total Ionizing Dose Results for Candidate Spacecraft Electronics for NASA. 2008 IEEE Radiation Effects Data Workshop, 5–10

  4. Dodd PE, Shanneyfelt MR, Schwank JR, Felix JA (2010) Current and future challenges in radiation effects on cmos electronics. IEEE Trans on Nuclear Science 57(4):1747–1763

    Article  Google Scholar 

  5. Freijedo J, Costas L, Semião J, Rodríguez-Andina JJ, Moure MJ, Vargas F, Teixeira IC, Teixeira JP (2010) Impact of power supply voltage variations on FPGA-based digital systems performance. Journal of Low Power Electronics 6:339–349

    Article  Google Scholar 

  6. Hughes HL, Benedetto JM (2002) Radiation effects and hardening of MOS technology: Devices and circuits. IEEE Trans Nuclear Science 50(3):500–521

    Article  Google Scholar 

  7. IEC 61.000-4-29: Electromagnetic compatibility (EMC) – Part 4–29: Testing and measurement techniques – Voltage dips, short interruptions and voltage variations on d.c. input power port immunity tests, First Edition, 2000–01. (www.iec.ch)

  8. IEC 62132–2, Ed. 1: Integrated Circuits – Measurement of Electromagnetic Immunity, 150KHz to 1 GHz – Part 2: Measurement of Radiated Immunity - TEM Cell Method. This part of IEC 62132 is to be read in conjunction with IEC 62132–1. (www.iec.ch)

  9. IEC Stds. 61.000-4-17: Electromagnetic compatibility (EMC) – Part 4–17: Testing and measurement techniques – Ripple on d.c. input power port immunity test, Edition 1.2, 2009–01. (www.iec.ch)

  10. ISO/ASTM51401 - Standard Practice for Use of a Dichromate Dosimetry System. ASTM International, West Conshohocken, PA, 2003

  11. Perez R (1997) Signal integrity issues in ASIC and FPGA design, International Symposium on Electromagnetic Compatibility – EMC’97 334–339

  12. Quinn H, Graham P, Krone J, Caffrey M, Rezgui S (2005) Radiation-induced multi-bit upsets in SRAM-based FPGAs. IEEE Trans on Nuclear Science 52(6):2455–2461

    Article  Google Scholar 

  13. Semião J, Freijedo J, Moraes M, Mallmann M, Antunes C, Benfica J, Vargas F, Santos M, Teixeira IC, Rodríguez-Andina JJ, Teixeira JP, Lupi D, Gatti E, Garcia L, Hernandez F (2009) Measuring clock-signal modulation efficiency for systems-on-chip in electromagnetic interference environment, 10th IEEE Latin American Test Workshop (LATW’09)

  14. Smith F, Mostert S (2007) Total ionizing dose mitigation by means of reconfigurable FPGA computing. IEEE Trans on Nuclear Science 54(4):1343–1349

    Article  Google Scholar 

  15. Srour JR, McGarrity JM (1988) Radiation Effects on Microelectronics in Space. Proceedings of IEEE 76(11)

  16. US Department of Defense - Test Method Standard Microcircuits MIL-STD-883 H. February 2010

Download references

Acknowledgments

This work has been partially funded by CNPq (Science and Technology Foundation, Brazil) under contracts n. 301726/2008-6 and n. 490547/2007-9.

Author information

Authors and Affiliations

  1. Catholic University - PUCRS, Porto Alegre, Brazil

    Juliano Benfica, Letícia Maria Bolzani Poehls & Fabian Vargas

  2. Facultad de Ingeniería, Universidad de Buenos Aires, Buenos Aires, Argentina

    José Lipovetzky & Ariel Lutenberg

  3. Instituto Nacional de Tecnología Industrial - INTI, Buenos Aires, Argentina

    Edmundo Gatti

  4. Universidad ORT, Montevideo, Uruguay

    Fernando Hernandez

Authors
  1. Juliano Benfica
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Letícia Maria Bolzani Poehls
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Fabian Vargas
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. José Lipovetzky
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Ariel Lutenberg
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Edmundo Gatti
    View author publications

    You can also search for this author in PubMed Google Scholar

  7. Fernando Hernandez
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Letícia Maria Bolzani Poehls.

Additional information

Responsible Editor: V. Champac

Rights and permissions

Reprints and permissions

About this article

Cite this article

Benfica, J., Bolzani Poehls, L.M., Vargas, F. et al. A Test Platform for Dependability Analysis of SoCs Exposed to EMI and Radiation. J Electron Test 28, 803–816 (2012). https://doi.org/10.1007/s10836-012-5334-z

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-012-5334-z

Keywords

Search

Navigation