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Implementation of a Boolean function with a double-gate vertical TFET (DGVTFET) using numerical simulations

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Abstract

Tunnel field-effect transistors (TFETs) have been explored extensively as a possible substitute for MOSFETs, especially for digital system design applications. Unlike conventional MOSFET devices, TFETs exhibit certain unique characteristics which are suitable for energy-efficient digital system design. In this paper, we report the use of a single device with both terminals biased independently for basic two-input Boolean logic operations AND, OR, NAND, and NOR using technology computer-aided design (TCAD) simulations. It is shown that these basic Boolean operations can be realized by minimally altering the design of a double-gate vertical TFET (DGVTFET) device and by selecting the appropriate device characteristics. The results show that when the Boolean functions are implemented, the ION/IOFF ratio is in the range of 109 to 1013 at a supply voltage VDD = 1 V. Simulation results show that the use of a gate–source overlap technique and the selection of a suitable silicon body thickness are vital to obtaining distinct logic functions using a DGVTFET.

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Funding

The authors would like to acknowledge the SERB TARE GRANT Project no. TAR/2022/000406, Govt. of India, and VIT Bhopal University, Kothrikalan, Sehore-466114, for technical and financial support.

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Authors and Affiliations

  1. Manipal School of Information Sciences (MSIS), Manipal Academy of Higher Education (MAHE), Manipal, Udupi, Karnataka, 576104, India

    Ribu Mathew

  2. School of Electrical and Electronics Engineering (SEEE), VIT Bhopal University, Kothrikalan, Sehore, 466114, India

    Ankur Beohar, Jyotirmoy Ghosh & Pallabi Sarkar

  3. XFAB GmbH, Grenzstraße 28, Dresden, 01109, Germany

    Abhishek Kumar Upadhyay

Authors
  1. Ribu Mathew
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  2. Ankur Beohar
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  3. Jyotirmoy Ghosh
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  4. Pallabi Sarkar
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  5. Abhishek Kumar Upadhyay
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Contributions

Ribu, Ankur, and Jyotirmoy conceptualized the idea and implemented the study using simulation. Ribu, Abhishek, and Pallabi wrote the paper.

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Correspondence to Ribu Mathew.

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Mathew, R., Beohar, A., Ghosh, J. et al. Implementation of a Boolean function with a double-gate vertical TFET (DGVTFET) using numerical simulations. J Comput Electron 23, 525–532 (2024). https://doi.org/10.1007/s10825-024-02170-9

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  • DOI: https://doi.org/10.1007/s10825-024-02170-9

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