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Analytical breakdown voltage model for a partial SOI-LDMOS transistor with a buried oxide step structure

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Abstract

We have developed a simple physics-based two-dimensional analytical off-state breakdown voltage model of a partial buried oxide step structure (PBOSS) silicon-on-insulator laterally diffused metal oxide semiconductor (SOI-LDMOS) transistor. The analytical model includes the expressions of surface potential and electric field distributions in the drift region by solving the 2D Poisson equation. The electric field at the Si–SiO2 surface is modulated by additional electric field peaks developed due to the presence of the PBOSS structure. The uniformly distributed electric field results in improved breakdown voltage. Further, the breakdown voltage is analytically obtained by means of the critical electric field concept, to determine the breakdown characteristics. The model reveals the impact of the critical device design parameters such as thickness and length of the PBOSS structure, doping, and thickness of the drift region on the surface electric field and the breakdown voltage. The proposed model is verified by ATLAS two-dimensional simulations. The analytical model will be useful to design high-voltage SOI-LDMOS transistors for power switching applications.

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Acknowledgements

The authors would like to acknowledge TEQIP-II and the Department of Electronics and Communication Engineering, NIT Durgapur, for extending financial support for the ATLAS device simulator. Shrabasti Mandal, an undergraduate student of the National Institute of Technology, Durgapur, is also acknowledged for their contribution.

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Correspondence to Rajat Mahapatra.

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Sahoo, J., Mahapatra, R. Analytical breakdown voltage model for a partial SOI-LDMOS transistor with a buried oxide step structure. J Comput Electron 20, 1711–1720 (2021). https://doi.org/10.1007/s10825-021-01756-x

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  • DOI: https://doi.org/10.1007/s10825-021-01756-x

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