Skip to main content
Log in

Efficient detection of transistor stuck-on faults in CMOS circuits using low-overhead single-ended ring oscillators

  • Published:
Journal of Computational Electronics Aims and scope Submit manuscript

Abstract

Very large-scale integration technology is accelerating the growth and prevalence of nanoscale devices worldwide, but at the same time facing technical challenges in terms of fault detection due to the compact size of chips. Thus, the detection of faults in chips caused by limitations of the manufacturing process or operational aspects of the architecture is obligatory to assess the effective performance of devices. In this paper, two single-ended ring oscillator (SERO)-based transistor stuck-on (TSON) fault detection methods are proposed for complementary metal–oxide–semiconductor (CMOS) circuits. The SERO is used as a current-controlled and voltage-controlled oscillator in method 1 and 2, respectively, reducing the circuit overhead of the detection block. Simulations are carried out using Cadence Virtuoso in 90-nm technology. The results show that both methods can successfully detect TSON faults in CMOS circuits based on the oscillatory behavior of the SERO. Moreover, these methods avoid the need to sense the output voltage level or quiescent current, which increases the possibility of successful fault detection, especially for submicron-level structures by avoiding improper logic and unreliable current values. Test vectors and fault locations can also be easily identified using the proposed methods, reducing the implementation complexity of CMOS fault detection techniques.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13

Similar content being viewed by others

References

  1. Jha, N.K., Kundu, S.: Testing and Reliable Design of CMOS Circuits. Kluwer Academic, Massachusetts (1990)

    Book  Google Scholar 

  2. Rinitha, R., Ponni, R.: Testing in VLSI: a survey. In: Proceedings of International Conference on Emerging Trends in Engineering, Technology and Science (2016)

  3. Asvini, S., Nirmala, C.: Design for testability in timely testing of VLSI circuits. Int. J. Eng. Res. Appl. 5(3), 10–13 (2015)

    Google Scholar 

  4. Plusquellic, J.: Faults 2. VLSI design verification and test slides, Department of CSEE, University of Maryland, Baltimore County (UMBC), Maryland (2006)

  5. Malaiya, Y.K., Su, S.Y.H.: A new fault model and testing technique for CMOS devices. In: Proceeding of International Test Conference, pp. 25–34 (1982)

  6. Rajsuman, R.: Iddq testing for CMOS VLSI. Proc. IEEE 88(4), 544–568 (2000)

    Article  Google Scholar 

  7. Jha, N.K., Gupta, S.: Testing of Digital System. Cambridge University Press, Cambridge (2003)

    Book  Google Scholar 

  8. Nuernbergk, D.K., Lang, C.: Fast and precise on-chip IDDQ current sensor. In: 15th ITG/GMM Symposium ANALOG, pp. 33–38 (2016)

  9. Figueras, J., Ferre, A.: Possibilities and limitations of IDDQ testing in submicron CMOS. IEEE Trans. Compon. Packag. Manuf. Technol. 21(4), 352–359 (1998)

    Article  Google Scholar 

  10. Mandal, M.K., Sarkar, B.C.: Ring oscillators: characteristics and applications. Indian J. Pure Appl. Phys. 48, 136–145 (2009)

    Google Scholar 

  11. Georgoulopoulos, N., Hatzopoulos, A.: Effectiveness evaluation of the TSV fault detection method using ring oscillators. In: Proceeding of 6th International Conference on Modern Circuits and Systems Technologies (2017)

  12. Harb, S.M.S., Eisenstadt, W.: On-chip testing schemes of through-silicon-vias (TSVs) in 3D stacked ICs. Adv. Sci. Technol. Eng. Syst. J. 2(3), 1260–1265 (2017)

    Article  Google Scholar 

  13. Deutsch, S., Chakrabarty, K.: Contactless pre-bond TSV test and diagnosis using ring oscillators and multiple voltage levels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33(5), 774–785 (2014)

    Article  Google Scholar 

  14. Fkih, Y., Vivet, P., Rouzeyre, B., Flottes, M., Natale, G.D.: A 3D IC BIST for pre-bond test of TSVs using ring oscillators. In: Proceeding of 11th IEEE International New Circuits and Systems Conference (2013)

  15. Arabi, K., Ihs, H., Dufaza, C., Kaminska, B.: Digital oscillation-test method for delay and stuck-at fault testing of digital circuits. In: International Test Conference, pp. 91–100 (1998)

  16. Mohsen, A.A.K., El-Yazeed, M.F.A.: Selection of input stimulus for fault diagnosis of analog circuits using ARMA model. AEU Int. J. Electron. Commun. 58(3), 212–217 (2004)

    Article  Google Scholar 

  17. Binu, D., Kariyappa, B.S.: A survey on fault diagnosis of analog circuits: taxonomy and state of the art. AEU Int. J. Electron. Commun. 73, 68–83 (2017)

    Article  Google Scholar 

  18. Singh, G., Angurana, M.S.: Design of wide tuning range and low power dissipation of VCRO in 50 nm CMOS technology. Int. J. Adv. Res. Electr. Electron. Instrum. Eng. 3(5), 9675–9679 (2014)

    Google Scholar 

  19. Niknejad, A.M.: Lecture 12: MOS Transistor Models. Department of EECS, University of California, Berkeley (2013)

  20. Maly, W., Nigh, P.: Built-in current testing—feasibility study. In: Proceeding of International Conference on Computer Aided Design, pp. 340–343 (1988)

  21. Shen, T.L., Daly, J.C., Lo, J.C.: A 2-ns detecting time, 2 um CMOS built-in current sensing circuit. IEEE J. Solid State Circuits 28(1), 72–77 (1993)

    Article  Google Scholar 

  22. Bastos, R.P., Guimaraes, L.A., Torres, F.S.: Architectures of bulk built-in current sensors for detection of transient faults in integrated circuits. Microelectron. J. 71, 70–79 (2018)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to S. M. Ishraqul Huq.

Additional information

Publisher’s Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Huq, S.M.I., Roy, A., Ahmed, M. et al. Efficient detection of transistor stuck-on faults in CMOS circuits using low-overhead single-ended ring oscillators. J Comput Electron 19, 1685–1694 (2020). https://doi.org/10.1007/s10825-020-01555-w

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10825-020-01555-w

Keywords

Navigation