Artificial neural network design for compact modeling of generic transistors


DOI: 10.1007/s10825-017-0984-9

Cite this article as:
Zhang, L. & Chan, M. J Comput Electron (2017). doi:10.1007/s10825-017-0984-9


A methodology to develop artificial neural network (ANN) models to quickly incorporate the characteristics of emerging devices for circuit simulation is described in this work. To improve the model accuracy, a current and voltage data preprocessing scheme is proposed to derive a minimum dataset to train the ANN model with sufficient accuracy. To select a proper network size, four guidelines are developed from the principles of two-layer network. With that, a reference ANN size is proposed as a generic three-terminal transistor model. The ANN model formulated using the proposed approach has been verified by physical device data. Both the device and circuit-level tests show that the ANN model can reproduce and predict various device and circuits with high accuracy.


Compact model Emerging device Device modeling Artificial neural network (ANN) 

Funding information

Funder NameGrant NumberFunding Note
Research Grants Council, University Grants Committee
  • AoE-P04-08

Copyright information

© Springer Science+Business Media New York 2017

Authors and Affiliations

  1. 1.Department of ECEHong Kong University of Science and TechnologyKowloonHong Kong

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