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Delay uncertainty in MLGNR interconnects under process induced variations of width, doping, dielectric thickness and mean free path

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Abstract

This paper analyzes the delay performance of multi-layered graphene nanoribbon (MLGNR) interconnect under process induced variations. An equivalent multi-conductor transmission line (MTL) model driven by CMOS gate is employed for the analysis. The propagation delay is analyzed for different interconnect lengths and widths by taking into account the variations in width, dielectric thickness, dielectric constant, interlayer distance and doping concentration of MLGNR. Encouragingly, it is observed that the average deviation in delay is below 3 % for all process induced parameter variations except for the mean free path.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Microelectronics and VLSI Group, Indian Institute of Technology Roorkee, Roorkee , 247667, India

    K. Narasimha Reddy, Manoj Kumar Majumder & Brajesh Kumar Kaushik

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  1. K. Narasimha Reddy
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  2. Manoj Kumar Majumder
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  3. Brajesh Kumar Kaushik
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Correspondence to Manoj Kumar Majumder.

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Reddy, K.N., Majumder, M.K. & Kaushik, B.K. Delay uncertainty in MLGNR interconnects under process induced variations of width, doping, dielectric thickness and mean free path. J Comput Electron 13, 639–646 (2014). https://doi.org/10.1007/s10825-014-0582-z

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