Skip to main content

Current progress in modeling self-heating effects in FD SOI devices and nanowire transistors

Journal of Computational Electronics volume 11, pages 238–248 (2012)Cite this article

Abstract

In this paper we summarize 6 years of work on modeling self-heating effects in nano-scale devices at Arizona State University (ASU). We first describe the key features of the electro-thermal Monte Carlo device simulator (the two-dimensional and the three-dimensional version of the tool) and then we present series of representative simulation results that clearly illustrate the importance of self-heating in larger nanoscale devices made in silicon on insulator technology (SOI). Our simulation results also show that in the smallest devices considered the heat is in the contacts, not in the active channel region of the device. Therefore, integrated circuits get hotter due to larger density of devices but the device performance is only slightly degraded at the smallest device size. This is because of two factors: pronounced velocity overshoot effect and smaller thermal resistance of the buried oxide layer. Efficient removal of heat from the metal contacts is still an unsolved problem and can lead to a variety of non-desirable effects, including electromigration. We propose ways how heat can be effectively removed from the device by using silicon on diamond and silicon on AlN technologies. We also study the interplay of Coulomb interactions due to the presence of a random trap at the source end of the channel and the self-heating effects. We illustrate the influence of a positive and a negative trap on the magnitude of the on-current and the role of the potential barrier at the source end of the channel.

This is a preview of subscription content, access via your institution.

Access options

Buy single article

Instant access to the full article PDF.

£ 29.95

Price includes VAT (United Kingdom)

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9
Fig. 10
Fig. 11
Fig. 12
Fig. 13
Fig. 16
Fig. 14
Fig. 15
Fig. 17
Fig. 18

References

  1. Raman, A., Walker, D.G., Fisher, T.S.: Non-equilibrium thermal effects in SOI power transistors. Solid-State Electron. 47, 1265–1273 (2003)

    Article  Google Scholar 

  2. www.silvaco.com

  3. Pop, E., Banerjee, K., Sverdrup, P., Dutton, R., Goodson, K.: Localized heating effects and scaling of sub-0.18 micron CMOS devices. IEDM Techn. Dig., 679 (2001)

  4. Sinha, S., Pop, E., Dutton, R.W., Goodson, K.E.: Non-equilibrium phonon distributions in sub-100 nm silicon transistors. Trans. Am. Soc. Mech. Eng. 128, 638–647 (2006)

    Google Scholar 

  5. Liu, W., Asheghi, M.: Phonon-boundary scattering in ultra-thin single crystal silicon layers. Appl. Phys. Lett. 84, 3819–3821 (2004)

    Article  Google Scholar 

  6. Li, D., Wu, Y., Kim, P., Shi, L., Yang, P., Majumdar, A.: Thermal conductivity of individual silicon nanowires. Appl. Phys. Lett. 83, 2934 (2003)

    Article  Google Scholar 

  7. Raleva, K., Vasileska, D., Goodnick, S.M., Nedjalkov, M.: Modeling thermal effects in nanodevices. IEEE Trans. Electron Devices 55, 1306–1316 (2008)

    Article  Google Scholar 

  8. Raleva, K., Vasileska, D., Goodnick, S.M.: Is SOD technology the solution to heating problems in SOI devices? IEEE Electron Device Lett. 29, 621–624 (2008)

    Article  Google Scholar 

  9. Lai, J., Majumder, A.: Concurrent thermal and electrical modeling of sub-micrometer silicon devices. J. Appl. Phys. 79, 7353–7361 (1996)

    Article  Google Scholar 

  10. Pop, E., Banerjee, K., Sverdrup, P., Dutton, R., Goodson, K.: Localized heating effects and scaling of sub-0.18 micron CMOS devices, IEDM Techn. Dig., 679 (2001)

  11. Vasileska, D., Raleva, K., Goodnick, S.M.: Self-heating effects in nano-scale FD SOI devices: the role of the substrate, boundary conditions at various interfaces and the dielectric material type for the BOX. IEEE Trans. Electron Devices 56, 3064–3071 (2009)

    Article  Google Scholar 

  12. Vasileska, D., Raleva, K., Goodnick, S.M.: Thermal effects in fully-depleted SOI devices. ECS Trans. 23, 337 (2009)

    Article  Google Scholar 

  13. Sondheimer, E.H.: The mean free path of electrons in metals. Adv. Phys. 1, 1–42 (1952) reprinted in Adv. Phys. 50, 499–537 (2001)

    Article  Google Scholar 

  14. Vasileska, D., Raleva, K., Goodnick, S.M.: Electrothermal studies of FD SOI devices that utilize a new theoretical model for the temperature and thickness dependence of the thermal conductivity. IEEE Trans. Electron Devices 57, 726–728 (2010)

    Article  Google Scholar 

  15. Palankovski, V., Selberherr, S.: Micro materials modeling in MINIMOS-NT. J. Microsyst. Technol. 7, 183–187 (2001)

    Article  Google Scholar 

  16. Dennard, R.H., Gaensslen, F.H., Yu, H.-N., Rideout, V.L., Bassous, E., LeBlanc, A.R.: Design of ion implanted MOSFET’s with very small physical dimensions. IEEE J. Solid-State Circuits SC-9, 256–268 (1974)

    Article  Google Scholar 

  17. Martin, P., Aksamija, Z., Pop, E., Ravaioli, U.: Impact of phonon-surface roughness scattering on thermal conductivity of thin Si nanowires. Phys. Rev. Lett. 102, 125503 (2009)

    Article  Google Scholar 

  18. Gadiyak, G.V., Obrecht, M.S.: Simulation of semiconductor devices and processes. In: Proceedings of the Second International Conference, p. 147 (1986)

    Google Scholar 

  19. Lugli, P., Ferry, D.K.: Electron-electron interaction and high field transport in Si. Appl. Phys. Lett. 46, 594–596 (1985)

    Article  Google Scholar 

  20. Zhou, J.-R., Ferry, D.K.: 3D simulation of deep-submicron devices: How impurity atoms affect conductance? IEEE Comput. Sci. Eng. 2, 30 (1995)

    Article  Google Scholar 

  21. Gross, W.J., Vasileska, D., Ferry, D.K.: A novel approach for introducing the electron-electron and electron-impurity interactions in particle-based simulations. IEEE Electron Device Lett. 20, 463–465 (1999)

    Article  Google Scholar 

  22. Gross, W.J., Vasileska, D., Ferry, D.K.: 3D Simulations of ultra-small MOSFETs with real-space treatment of the electron-electron and electron-ion interactions. VLSI Des. 10, 437–452 (2000)

    Article  Google Scholar 

  23. Vasileska, D., Gross, W.J., Ferry, D.K.: Monte-Carlo particle-based simulations of deep-submicron n-MOSFETs with real-space treatment of electron-electron and electron-impurity interactions. Superlattices Microstruct. 27, 147–157 (2000)

    Article  Google Scholar 

  24. Vasileska, D., Ahmed, S.S.: Narrow-width SOI devices: the role of quantum mechanical size quantization effect and the unintentional doping on the device operation. IEEE Trans. Electron Devices 52, 227–236 (2005)

    Article  Google Scholar 

  25. Khan, H.R., Vasileska, D., Ahmed, S.S., Ringhofer, C., Heitzinger, C.: Modeling of FinFETs: 3D MC simulation using FMM and unintentional doping effects on device operation. J. Comput. Electron. 3, 337–340 (2005)

    Article  Google Scholar 

  26. Vasileska, D., Hossain, A., Goodnick, S.M.: The role of the source and drain contacts on self-heating effect in nanowire transistors. In: ECS Transactions from the 25th Symposium on Microelectronics Technology and Devices, vol. 31, pp. 83–91 (2010)

    Google Scholar 

  27. Hossain, A.: PhD Thesis, Arizona State University (2011)

  28. Sadi, T., Kelsall, R.W.: Monte Carlo study of the electrothermal phenomenon in silicon-on-insulator and silicon-germanium-on-insulator metal-oxide field-effect transistors. J. Appl. Phys. 107, 064506 (2010)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

  1. School of ECEE, Arizona State University, Tempe, AZ, 85287-5706, USA

    D. Vasileska, A. Hossain & S. M. Goodnick

  2. University Sts. Cyril and Methodius, Skopje, Republic of Macedonia

    K. Raleva

Authors
  1. D. Vasileska
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. K. Raleva
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. A. Hossain
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. S. M. Goodnick
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to D. Vasileska.

Rights and permissions

Reprints and Permissions

About this article

Cite this article

Vasileska, D., Raleva, K., Hossain, A. et al. Current progress in modeling self-heating effects in FD SOI devices and nanowire transistors. J Comput Electron 11, 238–248 (2012). https://doi.org/10.1007/s10825-012-0404-0

Download citation

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10825-012-0404-0

Keywords

  • Self-heating effects
  • Fully-depleted SOI devices
  • Silicon on diamond and silicon on AlN
  • Nanowire transistors