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Novel True Random Number Generator Based Hardware Cryptographic Architecture Using Quantum-Dot Cellular Automata

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Abstract

Information processing and conventional computing are usually resource constrained; evermore they need to operate in a physically suspicious environment. Consequently, communication architectures, protocol and its security aspects have been the focus of many recent research works. Our proposal demonstrates how to amend this vulnerable circumstance through a three-stage security scheme in quantum-dot cellular automata (QCA) based nano-architecture. The primary objective of this hardware-based cryptographic architecture using QCA is to intend a distinctly secure communication architecture comprising less number of QCA cells, which enchant the comparative performance investigation along with the power-area constraints. In our proposed design the random bits are extorted from an asymmetrically arranged crossed loop TRNG where the seed circuits are used to boost the volatility of initiated number sequences as well as the distinction of the random numbers. In this work, a novel encryption-decryption prototype for a secure communication system has been implemented. The simulation results are obtained from QCADesigner tool v2.0.3, which fruitfully agreed with the industry standard. An intact evaluation of the proposed TRNG and the comparative analysis with a recent work of TRNG has been authorized by the 7.79% improvements in average energy dissipation for different Kink energy ratio. Altogether the proposed architecture and its contemporary implementation in QCA framework can be recognized by means of the advantages in 7.02% circuit complexity, 11.53% area, and 13.77% average leakage power dissipation with respect to the recent work of TRNG. Thus our proposed novel TRNG based hardware cryptographic architecture can be considered as a potential next-generation network-on-chip (NoC) realization for a large-scale cryptosystem in QCA technology.

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Acknowledgments

The authors are grateful to The SCIENCE AND ENGINEERING RESEARCH BOARD (DST-SERB), Govt. of India, for providing with the grant for accomplishment of the project under the Project FILE NO.ECR/2016/000613.

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Authors and Affiliations

  1. Narula Institute of Technology, 81, Nilganj Road, Agarpara, kol-700109, Kolkata, India

    Puspak Pain, Kunal Das, Arindam Sadhu & Maitreyi Ray Kanjilal

  2. West Bengal University of Technology, BF-142, Saltlake, Kolkata, India

    Debashis De

  3. School of Physics, University of Western Australia, M013 35, S.H, Crawley, Perth, Australia

    Debashis De

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  1. Puspak Pain
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Correspondence to Kunal Das.

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Pain, P., Das, K., Sadhu, A. et al. Novel True Random Number Generator Based Hardware Cryptographic Architecture Using Quantum-Dot Cellular Automata. Int J Theor Phys 58, 3118–3137 (2019). https://doi.org/10.1007/s10773-019-04189-2

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