International Journal of Parallel Programming

, Volume 41, Issue 2, pp 212–235

A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation

  • Oscar Almer
  • Igor Böhm
  • Tobias Edler von Koch
  • Björn Franke
  • Stephen Kyle
  • Volker Seeker
  • Christopher Thompson
  • Nigel Topham
Article

DOI: 10.1007/s10766-012-0222-9

Cite this article as:
Almer, O., Böhm, I., von Koch, T.E. et al. Int J Parallel Prog (2013) 41: 212. doi:10.1007/s10766-012-0222-9
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Abstract

In recent years multi-core processors have seen broad adoption in application domains ranging from embedded systems through general-purpose computing to large-scale data centres. Simulation technology for multi-core systems, however, lags behind and does not provide the simulation speed required to effectively support design space exploration and parallel software development. While state-of-the-art instruction set simulators (Iss) for single-core machines reach or exceed the performance levels of speed-optimised silicon implementations of embedded processors, the same does not hold for multi-core simulators where large performance penalties are to be paid. In this paper we develop a fast and scalable simulation methodology for multi-core platforms based on parallel and just-in-time (Jit) dynamic binary translation (Dbt). Our approach can model large-scale multi-core configurations, does not rely on prior profiling, instrumentation, or compilation, and works for all binaries targeting a state-of-the-art embedded multi-core platform implementing the ARCompact instruction set architecture (Isa). We have evaluated our parallel simulation methodology against the industry standard Splash-2 and Eembc MultiBench benchmarks and demonstrate simulation speeds up to 25,307 Mips on a 32-core x86 host machine for as many as 2,048 target processors whilst exhibiting minimal and near constant overhead, including memory considerations.

Keywords

Instruction set simulators Just-in-time compilation Multicore processors Parallel dynamic binary translation Scalable multicore simulation 

Copyright information

© Springer Science+Business Media New York 2012

Authors and Affiliations

  • Oscar Almer
    • 1
  • Igor Böhm
    • 1
  • Tobias Edler von Koch
    • 1
  • Björn Franke
    • 1
  • Stephen Kyle
    • 1
  • Volker Seeker
    • 1
  • Christopher Thompson
    • 1
  • Nigel Topham
    • 1
  1. 1.Institute for Computing Systems ArchitectureUniversity of EdinburghEdinburghUK

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