Computer languages, textual and visual, and formal models are in close interaction. The former enable the expression of design intent, and the latter capture this intent in a way suitable for computer aided or automated analysis and synthesis. With escalating design complexity and tightening requirements on functional and non-functional properties, the proper matching of languages and models to support analysis and synthesis techniques—and vice versa—is becoming essential in solving design challenges related to the efficiency, safety, and timely rollout of embedded systems.
This special issue of the Journal of Design Automation for Embedded Systems features articles on languages and models for software, digital hardware, and analog aspects of embedded systems. Authors of selected papers from the Forum on Design and Specification Languages (FDL 2011) were encouraged to submit significantly extended versions of their work. The special issue received 11 submissions from this context and 3 external contributions from other authors. Based on the results of two rounds of reviews, 5 articles were selected, 4 from the FDL 2011 context and 1 external.
The first paper, entitled Progressive and Explicit Refinement of Scheduling for Multidimensional Data-Flow Applications using UML MARTE, is contributed by Calin Glitia, Julien DeAntoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, and Abdoulaye Gamatié. The authors show how a Model of Computation and the successive refinement of designs based on this model are integrated into the framework of the UML profile MARTE for model based engineering.
The second paper, by Jens Brandt, Mike Gemünde, Klaus Schneider, Sandeep K. Shukla, and Jean-Pierre Talpin, is entitled Representation of Synchronous, Asynchronous, and Polychronous Components by Clocked Guarded Actions. The authors devise translation procedures that enable the comprehensive capturing of specifications that are heterogeneous with respect to their synchronization paradigm.
The third paper presents ASDeX: a formal specification for analog circuits enabling a fully automated design validation. The authors, Mingyu Ma, Lars Hedrich, and Christian Sporrer, describe an XML-based format that captures analog library information so that validation activities can be fully automated.
The fourth paper, HDTLib: an efficient implementation of SystemC data types for fast simulation at different abstraction levels, is authored by Nicola Bombieri, Franco Fummi, Valerio Guarnieri, Francesco Stefanni, and Sara Vinco. It describes bit-true data types that enhance the simulation performance of SystemC models significantly over the built-in data types of the SystemC library.
Finally, the paper contributed by Vaibhav Jain, Anshul Kumar, and Preeti Panda, is entitled Exploiting UML based Validation for Compliance Checking of TLM 2 based Models. It offers a solution for analyzing the compliance of SystemC Transaction Level Modeling (TLM 2) models with the intricate rules defined in the TLM 2 standard but not enforced by the TLM 2 library.
It has been a pleasure to compile these papers that represent the state of the art and recent advances in the field of languages and models for embedded systems design, and we would like to thank all the authors for their hard work and contributions, the anonymous reviewers for their great effort and scrutiny, and the staff from DAEM for their professional and prompt support in all matters. We sincerely hope that you, the reader, will enjoy studying this issue and will benefit in your professional work.
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Radetzki, M., Jantsch, A. Editorial introduction. Des Autom Embed Syst 18, 61–62 (2014). https://doi.org/10.1007/s10617-012-9094-x