Convolutional neural network acceleration with hardware/software co-design

  • Andrew Tzer-Yeu Chen
  • Morteza Biglari-Abhari
  • Kevin I-Kai Wang
  • Abdesselam Bouzerdoum
  • Fok Hing Chi Tivive
Article

Abstract

Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.

Keywords

Computer vision Embedded system Neural network Co-design Hardware acceleration FPGA Real-time Gender recognition 

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Copyright information

© Springer Science+Business Media, LLC 2017

Authors and Affiliations

  1. 1.Department of Electrical and Computer EngineeringThe University of AucklandAucklandNew Zealand
  2. 2.School of Electrical, Computer, and Telecommunications EngineeringUniversity of WollongongWollongongAustralia
  3. 3.College of Science and EngineeringHamad Bin Khalifa UniversityDohaQatar

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