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FPGA-enabled lossless ECG signal compression system using an integer adaptive compressor

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Abstract

The most common non-invasive diagnostic model is the Electrocardiogram (ECG), which records the heart’s electrical activity over time and is used to diagnose various heart conditions. Due to the requirements of a typical eHealth system, it is necessary to compress ECG signals for long-term data recording and remote transmission. Moreover, cardiovascular diseases (CVDs) have been considered the most long-lasting disorders in recent years. The transmission of information from the patient to the distant hospital is necessary because rapid analysis and treatment are essential for the condition to be cured. Also, the data must be in the form of lossless and high-predictability data. So, the goal of this study was to create a two-stage lossless Integer Adaptive Predictor (IAP) compressor that could be implemented on a Field Programmable Gate Array (FPGA) without introducing any data loss during the compression process. Before compression, the ECG signals are denoised using a Fast Normalized Least Mean Square (FNLMS) algorithm-based adaptive filter, which removes the undesirable noise presented in the signal. Here, the adaptive filter is designed based on the hybrid systolic folding structure and compressor-based multiplier architecture to minimize the power, delay and area consumption of the filter while performing the signal-denoising process. Xilinx and MATLAB are used to run simulations using the MIT-BIH Arrhythmia and PTB diagnostic databases. Several performance parameters are used to assess the proposed design’s efficacy, and the results are compared to those of similar current designs. Consequently, the proposed compressor achieves a 45.23% compression ratio (CR) on MIT-BIH and a 10.87% average CR on the PTB diagnostic database, which demonstrates that the compression proficiency of the proposed design is high.

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  1. Department of ECE, School of Engineering, Mohan Babu University, (Erstwhile Sree Vidyanikethan Engineering College), Tirupati, Andhra Pradesh, 517102, India

    Palagiri Veera Reddy & V. V. Satyanarayana Tallapragada

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  1. Palagiri Veera Reddy
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Reddy, P.V., Tallapragada, V.V.S. FPGA-enabled lossless ECG signal compression system using an integer adaptive compressor. Analog Integr Circ Sig Process 119, 331–361 (2024). https://doi.org/10.1007/s10470-024-02269-w

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