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A second-order two-channel time-interleaved delta-sigma modulator circuit design

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Abstract

Among analog to digital converters, high speed ADCs are accomplished by the time interleaved delta-sigma modulators. The block digital filtering (BDF) method is a proper method to implement the Time-interleaved Delta-sigma modulators (TIDSM). In this method, M delta-sigma modulators are placed in parallel and the sampling rate in each of the parallel channel will be \({\mathrm{f}}_{\mathrm{s}}\),whereby the effective sampling rate become\(\mathrm{M}*{\mathrm{f}}_{\mathrm{s}}\). The serious disadvantage of the TIDSM based on BDF is that its NTF is equal to the standard structure. The time interleaved structure described in this paper is based on Noise Coupled time interleaved delta-sigma modulator (NC-TIDSM) that uses a noise-coupled between the channels. In this modulator not only the effective sampling is increased but also the overall noise transfer function order is increased by two or more without any additional active element. For implementation of the NC-TIDSM structure, the theoretical relations are proved and then these results have been verified by implementation of the second-order two-channel NC-TIDSM in circuit level and in an 180 nm CMOS technology. Using a 1.8 V supply, the SNDR of 62 dB in a 10 MHz signal band is achieved for the second-order two-channel NC-TIDSM.

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The authors declare that the data supporting the findings and obtained during this research work are available within the paper.

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  1. Microelectronic Research Lab., EE Department, Sahand University of Technology, Tabriz, Iran

    Mahmud Abdoli & Esmaeil Najafiaghdam

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  1. Mahmud Abdoli
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  2. Esmaeil Najafiaghdam
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Correspondence to Esmaeil Najafiaghdam.

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Abdoli, M., Najafiaghdam, E. A second-order two-channel time-interleaved delta-sigma modulator circuit design. Analog Integr Circ Sig Process 112, 457–466 (2022). https://doi.org/10.1007/s10470-022-02066-3

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