Abstract
In this paper, high linearity, low power down-conversion mixer is presented with a 65-nm CMOS process for vehicle-to-everything (V2X) applications. 5G NR V2X standard has a carrier frequency of 5.9 GHz with 10 and 20 MHz narrow bandwidth options. The mixer design uses a double-balanced topology with a second-order intermodulation injection linearization technique to improve the linearity performance. The charge injection method is also used to decrease the noise figure of the circuit. The designed circuit shows a single sideband integrated noise figure of 16.5 dB with a total conversion gain of 2 dB. The third-order input intercept point is obtained as 19.86 dBm. The design consumes a total current of 6 mA from a 1.2-V supply voltage. To the best of the authors' knowledge, this technique is the first applied to mixer design that has been designed for 5G NR based C-V2X applications in the literature.
This is a preview of subscription content, access via your institution.












Data availability
Data sharing not applicable to this article as no datasets were generated or analyzed during the current study.
References
GSA (2020). Automotive-Cellular-V2X Ecosystem (pp. 1–5).
Vitee, N., Ramiah, H., Mak, P. I., Yin, J., & Martins, R. P. (2019). A 3.15-mW +16.0-dBm IIP3 22-dB CG inductively source degenerated Balun-LNA mixer with integrated transformer-based gate inductor and IM2 injection technique. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 28, 700–713. https://doi.org/10.1109/TVLSI.2019.2950961
Amiri, M., & Abrishamifar, A. (2015). A high-linear CMOS down conversion mixer using adjusting the second and third-order harmonic in transconductance stage. Journal of Circuits, Systems, and Computers, 24(1), 1–11. https://doi.org/10.1142/S0218126615500024
Morad, E., Moussavi, S. Z., Alasvandi, M., & Rasouli, E. (2015). A low voltage, low power and highly linear CMOS down-conversion Gilbert cell mixer using MGTR method. Journal of Circuits, Systems, and Computers, 24(7), 1–9. https://doi.org/10.1142/S021812661550098X
Asghari, M., & Yavari, M. (2014). Using interaction between two nonlinear systems to improve IIP3 in active mixers. Electronics Letters, 50(2), 76–77. https://doi.org/10.1049/el.2013.3164
Liang, K. H., Lin, C. H., Chang, H. Y., & Chan, Y. J. (2008). A new linearization technique for CMOS RF mixer using third-order transconductance cancellation. IEEE Microwave and Wireless Components Letters, 18(5), 350–352. https://doi.org/10.1109/LMWC.2008.922129
Li, H., & Saavedra, C. E. (2019). Linearization of active downconversion mixers at the if using feedforward cancellation. IEEE Transactions on Circuits and Systems I: Regular Papers, 66(4), 1620–1631. https://doi.org/10.1109/TCSI.2018.2883920
Cheng, W., Annema, A. J., Wienk, G. J. M., & Nauta, B. (2013). A flicker noise/IM3 cancellation technique for active mixer using negative impedance. IEEE Journal of Solid-State Circuits, 48(10), 2390–2402. https://doi.org/10.1109/JSSC.2013.2272339
Ozkan, B., & Zencir, E. (2021). A low-power high-gain and high linearity CMOS RF front-end design involving a charge injection mixer for V2X technology. Journal of Circuits, Systems, and Computers. https://doi.org/10.1142/s021812662150198x
Da Chen, J., & Wang, S. H. (2017). A low-power, high-gain, and low-noise 802.11a down-conversion mixer in 0.35-μm SiGe Bi-CMOS technology. Journal of Circuits, Systems, and Computers, 26(9), 1–13. https://doi.org/10.1142/S0218126617501341
Mollaalipour, M., & Miar-Naimi, H. (2016). Design and analysis of a highly efficient linearized CMOS subharmonic mixer for zero and low-IF applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(6), 2275–2285. https://doi.org/10.1109/TVLSI.2015.2504486
Mollaalipour, M., & Miar-Naimi, H. (2013). An improved high linearity active CMOS mixer: Design and volterra series analysis. IEEE Transactions on Circuits and Systems I: Regular Papers, 60(8), 2092–2103. https://doi.org/10.1109/TCSI.2013.2239159
Lou, S., & Luong, H. C. (2008). A linearization technique for RF receiver front-end using second-order-intermodulation injection. IEEE Journal of Solid-State Circuits, 43(11), 2404–2412. https://doi.org/10.1109/JSSC.2008.2004531
Zhang, H., & Sánchez-Sinencio, E. (2011). Linearization techniques for CMOS low noise amplifiers: A tutorial. IEEE Transactions on Circuits and Systems I: Regular Papers, 58(1), 22–36. https://doi.org/10.1109/TCSI.2010.2055353
Asghari, M., & Yavari, M. (2016). An IIP3 enhancement technique for CMOS active mixers with a source-degenerated transconductance stage. Microelectronics Journal, 50, 44–49. https://doi.org/10.1016/j.mejo.2016.01.008
Bhatt, D., Mukherjee, J., & Redoute, J. M. (2014). A high isolation linear folded mixer for WiFi applications. In Proceedings of IEEE international symposium on circuits and systems (pp. 694–697). https://doi.org/10.1109/ISCAS.2014.6865230
Vahidfar, M. B., & Shoaei, O. (2008). A high IIP2 mixer enhanced by a new calibration technique for zero-IF receivers. IEEE Transactions on Circuits and Systems II: Express Briefs, 55(3), 219–223. https://doi.org/10.1109/TCSII.2008.918998
Solati, P., & Yavari, M. (2019). A wideband high linearity and low-noise CMOS Active mixer using the derivative superposition and noise cancellation techniques. Circuits, Systems, and Signal Processing, 38(7), 2910–2930. https://doi.org/10.1007/s00034-019-01023-2
Bijari, A., & Zandian, S. (2019). Linearity improvement in a CMOS down-conversion active mixer for WLAN applications. Analog Integrated Circuits and Signal Processing, 100(2), 483–493. https://doi.org/10.1007/s10470-019-01482-2
Acknowledgements
This work was supported by the EU ECSEL JU Program under grant number 876125.
Author information
Authors and Affiliations
Corresponding author
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
About this article
Cite this article
Özkan, B., Zencir, E. A low-power 65-nm CMOS mixer linearized with IM2 injection for V2X applications. Analog Integr Circ Sig Process 110, 489–497 (2022). https://doi.org/10.1007/s10470-021-01984-y
Received:
Revised:
Accepted:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10470-021-01984-y