Subthreshold biased enhanced bulk-driven double recycling current mirror OTA

Abstract

This paper presents a single-stage bulk-driven double recycling low-voltage low-power operational transconductance amplifier (OTA) operating in subthreshold region. The proposed OTA utilizes double recycling topology and provides enough open loop voltage gain, slew rate, and unity gain frequency (UGF). The flipped voltage follower-based adaptively biased input differential pair working in class AB mode has ensured dynamic current boosting and increased slew rate. Further, the proposed OTA has utilized partial positive feedback to mitigate some of the performance reduction caused by the bulk-driven topology. The simulation results of the proposed OTA have ensured open loop gain of 79.5 dB, UGF of 37.1 kHz, and phase margin of 64°. It operates with dual power supply of ± 0.25 V and consumes low power of 60 nW. These performance parameters validate its usefulness for LV, LP and low-frequency applications. The process, voltage, and temperature variation effects on low-frequency voltage gain, UGF, and phase margin of the proposed OTA has also been investigated with process corner simulations. The proposed OTA is designed and simulated in UMC 180 nm standard n-tub bulk CMOS process technology utilizing Tanner EDA tools.

Appendix

1.1 The inoise contribution of proposed OTA

The input referred thermal noise and flicker noise should be low for a low-voltage OTA cell. The first one has a flat power spectral density (PSD) whereas latter one is frequency dependent and is predominant in low frequency regions [30]. The noise may either be referred to input terminal (gate or bulk) of a MOS device called inoise or may be referred at output node of an amplifier called onoise. The bulk-driven input stage results in more input referred noise as compared to gate-driven circuit since g_mb < g_m. So, noise PSD at gate terminal is η² times of the noise PSD at bulk terminal of PMOS input pair where η = (n_p− 1) is its g_mb/g_m ratio. The onoise PSD at drain terminal in squared mean current form (A²/Hz) is given by (21) [7, 30]:

$$\overline{{i_{snD}^{2} }} = \overline{{i_{snD,th}^{2} }} \, + \,\overline{{i_{snD,(1/f)}^{2} }} = 4kT\,\left( {n_{p} \varGamma } \right)g_{mi} \, + \frac{{K_{FP}^{'} \,g_{mi}^{2} }}{{\left( {WL} \right)_{i} f}}$$

(21)

where (n_pГ) is product of substrate and thermal noise factors, K’_FP is flicker noise factor in fluctuation noise model (see on pp. 197, 207–209 of [30]) having unit of (nA . µm)² for $\overline{{i_{snD}^{2} }}$ and (nV . µm)² for $\overline{{V_{snG}^{2} }}$ and is related to K_FP of other noise model as K’_FP= K_FP/C ²_ox , the f is frequency, (WL)_i is the area of a concerned MOS transistor and other notations have their usual meanings as described in [30].

The value of Г is 1/2 [30] and g_mi is $\left( {{{i_{Di} } \mathord{\left/ {\vphantom {{i_{Di} } {n_{p} U_{T} }}} \right. \kern-0pt} {n_{p} U_{T} }}} \right)$, in weak inversion region of operation, so (21) could be expressed as (22),

$$\overline{{i_{snD}^{2} }} = \overline{{i_{snD,th}^{2} }} \, + \,\overline{{i_{snD,(1/f)}^{2} }} = \,\left( {2\,q\,i_{Di} \,\, + \frac{{K_{F}^{'} g_{mi}^{2} }}{{\left( {WL} \right)_{i} f}}} \right)$$

(22)

where q is the unit charge of an electron and g_mi is the gate transconductance of i^th MOSFET. The total noise voltage PSD [7, 30] at bulk-terminal $\overline{{V_{snB}^{2} }}$ could be expressed as (23)

$$\overline{{V_{snB}^{2} }} = \overline{{V_{snB,th}^{2} }} \, + \,\overline{{V_{snB,(1/f)}^{2} }} = \frac{{2qi_{Di} }}{{g_{mbi}^{2} }}\, + \frac{1}{{g_{mbi}^{2} }}\frac{{K_{FP}^{'} \,g_{mi}^{2} }}{{\left( {WL} \right)_{i} f}}$$

(23)

where g_mbi is bulk-transconductance of input pair. However, if the effective transconductance gain of the input pair MOSFETs at bulk-input terminal be G_meff, then its drain current PSD when referred to input terminal can be expressed as (24):

$$\overline{{V_{snB}^{2} }} = \overline{{V_{snB,th}^{2} }} \, + \,\overline{{V_{snB,(1/f)}^{2} }} = \frac{{2qi_{Di} }}{{G_{meff}^{2} }}\, + \frac{1}{{G_{meff}^{2} }}\frac{{K_{FP}^{'} g_{mi}^{2} }}{{\left( {WL} \right)_{i} f}}$$

(24)

The value of $g_{mi}^{2} = {{i_{Di}^{2} } \mathord{\left/ {\vphantom {{i_{Di}^{2} } {n_{p}^{2} }}} \right. \kern-0pt} {n_{p}^{2} }}\,U_{T}^{2}$ so, the (24) can be written as (25).

$$\overline{{V_{snB}^{2} }} = \overline{{V_{snB,th}^{2} }} \, + \,\overline{{V_{snB,(1/f)}^{2} }} = \frac{{2qi_{Di} }}{{G_{meff}^{2} }}\, + \frac{1}{{G_{meff}^{2} }}\frac{{i_{Di}^{2} K_{FP}^{'} }}{{n_{p}^{2} \,U_{T}^{2} \left( {WL} \right)_{i} f}}$$

(25)

The overall thermal noise PSD (in unit of V²/Hz) in weak inversion region operated double recycling core (within blue box of Fig. 2) including P_A4, P_B4 as well and assuming that there is a constant current source in place of FVF (red box Fig. 2), is approximated to (26):

$$\overline{{V_{snB,th}^{2} }} \, = \frac{4q}{{G_{meff}^{2} }}\left( {i_{dPA1} + i_{dPA2} + i_{dPA3} + i_{dNA5} + i_{dNA4} + \left( {1 + K} \right)i_{dNA1} + i_{dNB2} + i_{dNA3} + \frac{{E^{2} }}{{F^{2} }}\left( {i_{dNA6} + i_{dPA4} } \right) + \frac{{B^{2} }}{{A^{2} }}i_{dNB1} + \frac{{C^{2} }}{{D^{2} }}i_{dNA4} } \right)$$

(26)

where A = 2, B = 3, C = 1, D = 3, E = 1 and F = 6 and PPF factor K = 0.7 [20]. Applying these values in (26) thermal noise is given by (27)

$$\overline{{V_{snB,th}^{2} }} \, = \frac{4q}{{G_{meff}^{2} }}\left( {i_{dPA1} + i_{dPA2} + i_{dPA3} + i_{dNA5} + i_{dNA4} + 1.7\,i_{dNA1} + i_{dNB2} + i_{dNA3} + \frac{1}{36}\left( {i_{dNA6} + i_{dPA4} } \right) + \frac{9}{4}i_{dNB1} + \frac{1}{9}i_{dNA4} } \right)$$

(27)

Thus, its thermal noise contribution can be reduced by increasing the G_meff of OTA, i.e. by biasing the CMOS devices at high bias current.

Similarly, presenting the flicker noise and subthreshold slope factors of the NMOS transistors as $K_{FN}^{'}$ and n_n the flicker noise PSD of double recycling core in unit of V²/Hz could be approximated to (28):

$$\begin{aligned} \overline{{V_{snB,(1/f)}^{2} }} & = \frac{{2\,K_{FP}^{'} }}{{G_{meff}^{2} U_{T}^{2} \,n_{p}^{2} \,f}}\left( {\frac{{i_{{i_{dPA1} }}^{2} }}{{\left( {WL} \right)_{PA1} }} + \frac{{i_{{i_{dPA2} }}^{2} }}{{\left( {WL} \right)_{PA2} }} + \frac{{i_{{i_{dPA3} }}^{2} }}{{\left( {WL} \right)_{PA3} }} + \frac{1}{36}\frac{{i_{{i_{dPA4} }}^{2} }}{{\left( {WL} \right)_{PA4} }}} \right) + \frac{{2\,K_{FN}^{'} }}{{G_{meff}^{2} U_{T}^{2} \,n_{n}^{2} \,f}}\left( {\frac{{i_{{i_{dNA5} }}^{2} }}{{\left( {WL} \right)_{NA5} }} + \frac{{i_{{i_{dNA4} }}^{2} }}{{\left( {WL} \right)_{NA4} }} + \frac{{i_{{i_{dNA1} }}^{2} }}{{\left( {WL} \right)_{NA1} }}} \right) \\ & \quad + \frac{{2\,K_{FN}^{'} }}{{G_{meff}^{2} U_{T}^{2} \,n_{n}^{2} \,f}}\left( {\frac{{0.49\,i_{{i_{dNA1} }}^{2} }}{{\left( {WL} \right)_{NP1} }} + \frac{{i_{{i_{dNB2} }}^{2} }}{{\left( {WL} \right)_{NB2} }} + \frac{{i_{{i_{dNA3} }}^{2} }}{{\left( {WL} \right)_{NA3} }} + \frac{1}{36}\frac{{i_{{i_{dNA6} }}^{2} }}{{\left( {WL} \right)_{NA6} }} + \frac{9}{4}\frac{{i_{{i_{dNB1} }}^{2} }}{{\left( {WL} \right)_{NB1} }} + \frac{1}{9}\frac{{i_{{i_{dNB4} }}^{2} }}{{\left( {WL} \right)_{NB4} }}} \right) \\ \end{aligned}$$

(28)

Thus, its Flicker noise PSD can be reduced by increasing the G_meff and size of each MOS transistors.

In DRCM-ST the constant current source in Fig. 1 has been replaced by FVF cell which additionally contributes [7, 30] its own noise. The thermal noise contribution of this FVF is shown in (29). In (29) the degeneration effect (see Fig. 12) of R_S is considered for noise contribution of P_A5 and equivalent resistor R_S itself (see pages 497–502 of [30]).

$$V_{nsTh.}^{2} (FVF) = \frac{4q}{{G_{meff}^{2} }}\left( {i_{dPA6} + i_{dNA7} + i_{dPA5} \frac{{R_{S}^{2} \,g_{mbPA6}^{2} }}{{\left( {1 + g_{mbPA6} \,R_{S} } \right)^{2} }} + \frac{{2\,kT\,R_{S} \,g_{mbPA6}^{2} }}{{q\,\left( {1 + g_{mbPA6} \,R_{S} } \right)^{2} }}} \right)$$

(29)

where R_S = 1/G_me, in (29) and Fig. 12. In (29) first and second terms present the thermal noise of P_A6 and N_A7. The third term presents the thermal noise contribution of P_A5 and fourth term presents the noise of equivalent resistor R_S [7, 30].

Fig. 12

FVF sub-circuit for DRCM-ST

Similarly, the flicker noise contributed by FVF cell can be presented as (30):

$$V_{ns}^{2} \left( {1/f} \right)_{FVF} = \frac{{2\,K_{FP}^{'} }}{{G_{meff}^{2} U_{T}^{2} \,n_{p}^{2} \,f}}\left( {\frac{{i_{{_{d\,PA6} }}^{2} }}{{\left( {WL} \right)_{PA6} }} + \frac{{K_{FN}^{'} \,n_{p}^{2} \,i_{{_{d\,NA7} }}^{2} \,}}{{K_{FP}^{'} \,n_{n}^{2} \left( {WL} \right)_{NA7} \,}} + \frac{{i_{{_{d\,PA5} }}^{2} R_{S}^{2} \,g_{mbPA6}^{2} }}{{\left( {WL} \right)_{PA5} \left( {1 + g_{mbPA6} \,R_{S} } \right)^{2} }}} \right)$$

(30)

In (30) the first and second terms present the flicker noise of P_A6 and N_A7, respectively. The third term presents the flicker noise contribution of P_A5 [7, 30].