Ex-situ training of large memristor crossbars for neural network applications
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Memristor crossbar arrays carry out multiply–add operations in parallel in the analog domain, and can enable neuromorphic systems with high throughput at low energy and area consumption. Neural networks need to be trained prior to use. This work considers ex-situ training where the weights pre-trained by a software implementation are then programmed into the hardware. Existing ex-situ training approaches for memristor crossbars do not consider sneak path currents, and they may work only for neural networks implemented using small crossbars. Ex-situ training in large crossbars, without considering sneak paths, reduces the application recognition accuracy significantly due to the increased number of sneak current paths. This paper proposes ex-situ training approaches for both 0T1M and 1T1M crossbars that account for crossbar sneak paths and the stochasticity inherent in memristor switching. To carry out the simulation of these training approaches, a framework for fast and accurate simulation of large memristor crossbars was developed. The results in this work show that 0T1M crossbar based systems can be 17–83% smaller in area than 1T1M crossbar based systems.
KeywordsMemristor crossbars Neural networks Training Ex-situ training Sneak paths Low power pattern recognition system
This work was supported in part by a CAREER grant from the US National Science Foundation under Grant 1053149.
- 4.Taha, T. M., Hasan, R., & Yakopcic, C. (2014). Memristor crossbar based multicore neuromorphic processors. In IEEE international system-on-chip conference (SOCC) (pp. 383–389).Google Scholar
- 9.Yakopcic, C., Hasan, R., & Taha, T. M. (2015). Memristor based neuromorphic circuit for ex-situ training of multi-layer neural network algorithms. In IEEE IJCNN.Google Scholar
- 10.Hasan, R., Taha, T. M., & Yakopcic, C. (2015). Ex-situ training of dense memristor crossbar for neuromorphic applications. In The proceedings of the IEEE international symposium on nanoscale architectures.Google Scholar
- 15.Yakopcic, C., Taha, T. M., Subramanyam, G., & Pino, R. E. (2013). Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time. In IEEE international joint conference on neural networks (IJCNN).Google Scholar