# Advanced methods for nested Miller frequency compensation using voltage buffers

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## Abstract

New methods for the compensation of three-stage amplifiers are presented. In these methods, a rail-to-rail buffer enables designers to control the feedforward path. So far, the use of voltage buffer compensation has been reported merely in two-stage amplifiers. Using this in three-stage amplifiers results in the formation of left-half plane zeros, which can be applied to remove non-dominant poles. Two different methods are introduced. Firstly the voltage buffer is added to the path of the external loop capacitor to improve the gain bandwidth; secondly the voltage buffer is added to the internal loop capacitor. The internal path improves the gain bandwidth significantly (8 times in comparison with conventional NMC) by producing two left half plane zeros. Simulation results demonstrate the stability of the amplifiers and agree with design equations.

## Keywords

Three-stage amplifier Rail-to-rail buffer Compensation method Feedforward path## References

- 1.Eschauzier, R. G. H., Kerklaan, L. P. T., & Huijsing, J. H. (1992). A 100 MHz 100 dB operational amplifier with multipath nested Miller compensation structure.
*IEEE Journal of Solid-State Circuits,**27,*1709–1717.CrossRefGoogle Scholar - 2.Leung, K. N., & Mok, P. K. T. (2001). Nested Miller compensation in low power CMOS design.
*IEEE Transactions on Circuits and Systems II,**48*(4), 388–394.CrossRefGoogle Scholar - 3.Jalali, A., Bana, H. R., & Elahi, H. (2011). New method to compensate three-stage amplifiers based on pole- zero cancellation technique. In
*Proceedings of the international conference on communication systems and network technologies*(pp. 479–482).Google Scholar - 4.Jafari, A., Bijami, E., Bana, H. R., & Sadri, S. (2012). A design automation system for CMOS analog integrated circuits using new hybrid shuffled frog leaping algorithm.
*Microelectronics Journal,**43*(11), 908–915.CrossRefGoogle Scholar - 5.Bana, H. R., & Hashemipour, O. (2010). Positive feedback frequency compensation using internal current follower. In
*2010 18th Iranian Conference Proceeding of Electrical Engineering (ICEE)*(pp. 403–408).Google Scholar - 6.Ramos, J., & Steyaert, M. S. J. (2004). Positive feedback frequency compensation for low-voltage low-power three-stage amplifier.
*IEEE Transactions on Circuits and Systems I: Regular Papers,**51*(10), 1967–1974.CrossRefGoogle Scholar - 7.Leung, K. N., & Mok, P. K. T. (2001). Analysis of multi-stage amplifier-frequency compensation.
*IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications,**48*(9), 1041–1056.CrossRefGoogle Scholar - 8.Sawigun, C., Demosthenous, A., Liu, X., & Serdijn, W. (2012). A compact rail-to-rail class-ab CMOS buffer with slew-rate enhancement.
*IEEE Transactions on Circuits and Systems II: Express Briefs,**59*(8), 486–490.CrossRefGoogle Scholar - 9.Gallup-Montoro, C., Schneider, M. C., & Loss, I. J. B. (1994). Series-parallel association of FETs for high gain and high-frequency applications.
*IEEE Journal of Solid-State Circuits,**29,*1094–1101.CrossRefGoogle Scholar - 10.Taherzadeh-Sani, M., & Hamoui, A. A. (2011). 1-V process-insensitive current scalable two-stage Opamp with enhanced DC gain and settling behavior in 65-nm digital CMOS.
*IEEE Journal of Solid State Circuits,**46*(3), 660–668.CrossRefGoogle Scholar - 11.Eschauzier, R. G. H., & Huijsing, J. H. (1994). A compact power-efficient 3-V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries.
*IEEE Journal of Solid State Circuits,**29*(12), 1505–1513.CrossRefGoogle Scholar - 12.Leung, K. N., Mok, P. K. T., Ki, W. H., & Sin, J. K. O. (2000). Three-stage large capacitive load amplifier with damping-factor-control frequency compensation.
*IEEE Journal of Solid-State Circuits,**35,*221–230.CrossRefGoogle Scholar - 13.Lee, H., & Mok, P. K. T. (2003). Active-feedback frequency compensation for low-power multi stage amplifiers.
*IEEE Journal of Solid-State Circuits,**38,*511–520.CrossRefGoogle Scholar - 14.Lee, H., Leung, K. N., & Mok, P. K. T. (2003). A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation.
*IEEE Journal of Solid-State Circuits,**38,*1739–1744.CrossRefGoogle Scholar - 15.Fan, X., Mishra, C., & Sánchez-Sinencio, E. (2005). Single Miller capacitor frequency compensation technique for low power multistage amplifiers.
*IEEE Journal of Solid-State Circuits,**40*(3), 584–592.CrossRefGoogle Scholar - 16.Peng, X., & Sansen, W. (2004). AC boosting compensation scheme for low power multi stage amplifiers.
*IEEE Journal of Solid-State Circuits,**39*(11), 2074–2079.CrossRefGoogle Scholar - 17.Biabanifard, S., Largani, S. M., Akbari, M., Asadi, S., & Yagoub, M. C. (2015). High performance reversed nested Miller frequency compensation.
*Analog Integrated Circuits and Signal Processing,**85*(1), 223–233.CrossRefGoogle Scholar - 18.Guo, S., & Lee, H. (2011). Dual active-capacitive-feedback compensation for low-power large-capacitive-load three-stage amplifiers.
*IEEE Journal of Solid-State Circuits,**46*(2), 452–464.CrossRefGoogle Scholar