Abstract
This paper presents a dual RF down converter suitable for Multiple-Input and Multiple-Output infrastructure applications. The proposed architecture features a CMOS tapered buffer as local oscillator driver with a programmable supply voltage, provided by an embedded low dropout regulator. This approach allows scaling current consumption depending on linearity requirements. The RF path uses a balun with programmable tuning capacitors for single-to-differential signal conversion and \(50\text{-}\Omega\) input matching. A MOSFET passive mixer and a high-voltage (5 V) bipolar intermediate frequency amplifier complete the signal path. The circuit is fabricated in a SiGe:C BiCMOS process, occupies an area of \(2.8\, \text{mm} \, \times \, 2.5\, \text{mm}\), and has been assembled in a \(6\, \text{mm} \, \times \,6\, \text{mm}\), 40-pin, quad flat no-lead (QFN) package.
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Alessi, G., Clerici, F. A SiGe:C BiCMOS dual down converter for MIMO wireless infrastructure with configurable current consumption and linearity. Analog Integr Circ Sig Process 95, 307–313 (2018). https://doi.org/10.1007/s10470-018-1132-6
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DOI: https://doi.org/10.1007/s10470-018-1132-6