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99.83% Switching energy reduction over conventional scheme for SAR ADC without reset energy

  • Mixed Signal Letter
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Abstract

A high-efficient switching method for successive approximation register (SAR) analogue-to-digital converter (ADC) is proposed. With the proposed variable resolution SAR ADC architecture, the average switching energy and area can be reduced by 99.60 and 73.54% respectively compared to the conventional scheme. Combined with C–2C capacitor array and unilateral monotonic scheme, the proposed two-step architecture achieves 99.83% less average switching energy and 76.37% less area reduction over the conventional approach. Furthermore, these two methods have no rest energy consumption.

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Acknowledgements

This work is supported by the Strategic international scientific and technological innovation cooperation key Projects (2016YFE0207000), the Natural Science Foundation of Shaanxi Province of China (2016JM6067), the National Natural Science Foundation of China (61076031) and Aeronautical Science Foundation of China (20120281).

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Authors and Affiliations

  1. State Key Laboratory of Wide Bandgap Semiconductor Technology Disciplines, Xidian University, Xi’an, 710071, China

    Xin Xin, Jueping Cai & Ruilian Xie

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  1. Xin Xin
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  2. Jueping Cai
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  3. Ruilian Xie
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Correspondence to Jueping Cai.

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Xin, X., Cai, J. & Xie, R. 99.83% Switching energy reduction over conventional scheme for SAR ADC without reset energy. Analog Integr Circ Sig Process 94, 519–528 (2018). https://doi.org/10.1007/s10470-018-1113-9

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  • DOI: https://doi.org/10.1007/s10470-018-1113-9

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