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A chopper-stabilized instrumentation amplifier using area-efficient self-trimming technique

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Abstract

An area-efficient self-trimming technique for precision chopper-stabilized instrumentation amplifier (IA) is presented. The amplifier uses a reconfigurable differential pair for the input stage and it is automatically configured to reduce the mismatch of the differential pair, suppressing the chopper ripple. To confirm the effectiveness of the proposed scheme, an IA with the complete calibration logic is fabricated in a standard 180-nm CMOS and achieves \(0.06 {-}\hbox{mm}^2\) active area, less than \(3.5 {-}\upmu \hbox{V}\) offset voltage, \(13.5 {-}\hbox{nV}/\surd \hbox {Hz}\) input-referred noise, and \(194 {-} \upmu \hbox {A}\) current consumption. The noise efficiency factor of the amplifier is 7.2.

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Acknowledgments

This work was supported in part by MEXT Grant-in-Aid for Scientific Research 25820141, 25249047, and by CASIO Science Promotion Foundation. We thank also Rohm Corp. and Toppan Printing Corp. through the VLSI Design and Education Center (VDEC), the University of Tokyo, for chip fabrication.

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Authors and Affiliations

  1. Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi, 441-8580, Japan

    Ippei Akita & Makoto Ishida

  2. Electronics-Inspired Interdisciplinary Research Institute (EIIRIS), Toyohashi University of Technology, Toyohashi, 441-8580, Japan

    Makoto Ishida

Authors
  1. Ippei Akita
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  2. Makoto Ishida
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Correspondence to Ippei Akita.

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Akita, I., Ishida, M. A chopper-stabilized instrumentation amplifier using area-efficient self-trimming technique. Analog Integr Circ Sig Process 81, 571–582 (2014). https://doi.org/10.1007/s10470-014-0371-4

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  • DOI: https://doi.org/10.1007/s10470-014-0371-4

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