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A high voltage LDO with dynamic compensation network

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Abstract

A high voltage, low-dropout regulator (LDO) with dynamic compensation network is implemented in Nuvoton 0.6 μm BCD technology. The proposed HVLDO makes use of high voltage tolerance DMOS transistors to take most of the voltage press in each path, thus satisfying the requirement for wide input range. Besides, the proposed dynamic compensation network can achieve a great stability performance for the HVLDO structure under different load and input supply conditions. In addition, different output voltage is also implemented in this work and the transient response in each situation is also improved. Experimental result verifies that the proposed LDO is stable for a capacitive load of 1 μF and with a load capability of 30 mA. Moreover, the load transient measurements show that the maximum overshoot and undershoot voltage under a relative low supply are smaller than 83 and 103 mV, respectively; while the line transient measurements show that the output variation are within 50 mV among all circumstances. Besides, the measured quiescent current is only 8 μA under a 4 V supply.

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Acknowledgments

This work was supported by National Natural Science Foundation of China (No. 61106026).

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Correspondence to Hanxiao Du.

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Du, H., Lai, X. & Chi, Y. A high voltage LDO with dynamic compensation network. Analog Integr Circ Sig Process 80, 233–241 (2014). https://doi.org/10.1007/s10470-014-0328-7

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  • DOI: https://doi.org/10.1007/s10470-014-0328-7

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