Abstract
A 0.5–2.5 GHz ultra low power differential resistive feedback common gate low noise amplifier (RFCGLNA) without the use of inductor is presented. The proposed RFCGLNA adopts the NMOS and PMOS complementary topology to reduce the power consumption by half. Based on common-gate topology, the proposed RFCGLNA employs capacitive cross-coupling (CCC) and resistive feedback techniques. The CCC technique can further reduce the power consumption by half. The resistive feedback technique can constrain the common mode voltages of the proposed RFCGLNA and meanwhile, improve the third-order input intercept point (IIP3). The DC path is supplied by the current source transistor which forms a positive feedback loop to improve the gain at low frequency. Implemented with 65 nm standard complementary metal oxide semiconductor (CMOS) technology, the measured performance achieves 15 dB gain with S11 < −10 dB in the 0.5–2.5 GHz band. The noise figure (NF) is 3.9–5.0 dB and the IIP3 is 3.1–3.6 dBm. The power consumption is only 910 uW.
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Acknowledgments
The project has been sponsored in part by USTC and SMIC. The author would like to thank the strong support from the Info Science Lab of USTC and IMECAS through jointed lab of Micro-/nano-Electronic System Integration R&D Center (MESIC). The gratitude and appreciation go to in particular colleagues in USTC, MESIC and SMIC for their contributions and fruitful discussions.
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Sun, J., Diao, S., Feng, G. et al. A 0.5–2.5 GHz 910 uW complementary LNA employing positive–negative feedback. Analog Integr Circ Sig Process 80, 163–172 (2014). https://doi.org/10.1007/s10470-014-0317-x
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DOI: https://doi.org/10.1007/s10470-014-0317-x