Analog Integrated Circuits and Signal Processing

, Volume 77, Issue 3, pp 549–556 | Cite as

A 4 μW dual-modulus frequency divider with 198 % locking range for MICS band applications

Article

Abstract

This paper presents the design and performance of an ultra-low-power 4/5 frequency divider based on a CMOS ring oscillator. Measurements show a 198 % locking range (6 MHz–1.3 GHz) for both division ratios at room temperature, covering the MICS band and 433 and 915 MHz ISM bands while consuming only 4.07 μW from a 1 V supply at 400 MHz. The wide locking range and low power consumption makes it very suitable for ultra-low-power wireless systems. The divider is fabricated in a 90 nm CMOS process and occupies 45 μm2 of area.

Keywords

Frequency divider Dual-modulus MICS ISM Low-power Locking range 

References

  1. 1.
    Hu, J. R. & Otis, B. P. (2008). A 3 μW, 400 MHz divide-by-5 injection-locked frequency divider with 56% lock range in 90 nm CMOS. In IEEE Radio Frequency Integrated Circuits Symposium (pp. 665–668).Google Scholar
  2. 2.
    Wong, J. M. C., Cheung, V. S. L., & Luong, H. C. (2003). A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35 μm CMOS process. IEEE Journal of Solid-State Circuits, 38(10), 1643–1648.CrossRefGoogle Scholar
  3. 3.
    Heydari, P., & Mohanavelu, R. (2006). A 40-GHz flip-flop-based frequency divider. IEEE Transactions on Circuits and Systems II: Express Briefs, 53(12), 1358–1362.CrossRefGoogle Scholar
  4. 4.
    Lu, S., Meng, Y., Wang, F. & Jiang, X. (2013). A low-power dual-modulus prescaler in 90 nm CMOS technology. Advances in Mechanical and Electronic Engineering, LNEE 178, 163–168.Google Scholar
  5. 5.
    Motoyoshi, M. & Fujishima, M. (2006). 43 μW 6 GHz CMOS divide-by-3 frequency divider based on three-phase harmonic injection locking. In IEEE Asian Solid-State Circuits Conference (pp. 183–186).Google Scholar
  6. 6.
    Kai, Z., Islam, S. K., Holleman, J. H. & Song, Y. (2011). A low-power dual-modulus injection-locked frequency divider for medical implants. In IEEE Radio and Wireless Symposium (pp. 414–417).Google Scholar
  7. 7.
    Zhang, W., Zhang, L., Zhang, X., & Liu, Y. (2013). A dual-modulus injection-locked frequency divider with large locking range. Microwave and Optical Technology Letters, 55(2), 269–272.CrossRefGoogle Scholar
  8. 8.
    Yu, X. P., Lu, Z. H., Lim, W. M., & Yeo, K. S. (2013). 0.6mW 6.3 GHz 40 nm CMOS divide-by-2/3 prescaler using heterodyne phase-locking technique. Electronics Letters, 49(7), 471–472.CrossRefGoogle Scholar
  9. 9.
    Jahan, M. S., & Holleman, J. (2012). A 3.3 µW dual-modulus frequency divider with 189 % locking range for MICS band applications. In IEEE International Symposium on Circuits and Systems (pp. 1504–1507).Google Scholar
  10. 10.
    Lo, Y.-C., Chen, H.-P., Silva-Martinez, J. & Hoyos, S. (2009). A 1.8 V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider. In Custom Integrated Circuits Conference (pp. 259–262).Google Scholar
  11. 11.
    Chiu, W.-H., Chan, T.-S. & Lin, T.-H. (2007). A 5.5-GHz 16-mW fast-locking frequency synthesizer in 0.18-μm CMOS. In IEEE Asian Solid-State Circuits Conference (pp. 456–459).Google Scholar
  12. 12.
    Weste, N. H. E., & Harris, D. M. (2011). CMOS VLSI design: A circuits and systems perspective. Boston: Addison-Wesley.Google Scholar
  13. 13.
    Levantino, S., Romano, L., Pellerano, S., Samori, C., & Lacaita, A. L. (2004). Phase noise in digital frequency dividers. IEEE Journal of Solid-State Circuits, 39(5), 775–784.CrossRefGoogle Scholar
  14. 14.
    Liu, C. (2006). Jitter in oscillators with 1/f noise sources and application to true RNG for cryptography. (PhD dissertation, Dept. Electrical & Computer Engineering, Worcester Polytechnic Institute).Google Scholar
  15. 15.
    Hajimiri, A., Limotyrakis, S., & Lee, T. H. (1999). Jitter and phase noise in ring oscillators. IEEE Journal of Solid-State Circuits, 34(6), 790–804.CrossRefGoogle Scholar
  16. 16.
    Tong, H., Cheng, S., Karsilayan, A. I., & Silva-Martinez, J. (2007). An injection-locked frequency divider with multiple highly nonlinear injection stages and large division ratios. IEEE Transactions on Circuits and Systems II: Express Briefs, 54(4), 313–317.CrossRefGoogle Scholar
  17. 17.
    Luo, T.-N., & Chen, Y.-J. E. (2008). A 0.8-mW 55-GHz dual-injection-locked CMOS frequency divider. IEEE Transactions on Microwave Theory and Techniques, 56(3), 620–625.CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media New York 2013

Authors and Affiliations

  1. 1.The University of TennesseeKnoxvilleUSA

Personalised recommendations