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Novel detector implementations for 3G LTE downlink and uplink

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Abstract

We summarize our recent state-of-the-art programmable and reconfigurable detector and QR decomposition (QRD) implementations targeting 3G long term evolution (LTE) downlink and uplink requirements. The downlink transmission is based on the orthogonal frequency division multiplexing, whereas the uplink transmission uses a single-carrier frequency-division multiple access. The downlink implementations are based on the programmable transport triggered architecture (TTA) which provides a flexible and energy efficient architecture template. In TTA detector implementation, the LTE detection rate requirements up to 20 MHz bandwidth and 4 × 4 antenna system with 64-QAM, are achieved by using 1–6 programmable cores in parallel. Each core runs at 277 MHz clock frequency and consumes 55.5–64.0 mW depending on the detector configuration. The downlink detector is based on the selective spanning with fast enumeration algorithm. The uplink field-programmable gate array (FPGA) detector implementation is targeted for 4 × 4 antenna system and 64-QAM achieving a detection rate requirement for 20 MHz bandwidth. The used FPGA board for uplink implementation is Xilinx Virtex-6 and the implementation has been carried out using Xilinx Vivado high level synthesis tool. Two different detector architectures are implemented. The first one achieves the detection rate requirement with a single processing block running at 231 MHz and the latter one with four blocks in parallel, each running at 247 MHz. The implemented detector is based on the K-best algorithm. A multiple-input multiple-output receiver requires QRD to produce valid inputs for the detector. In addition to detector implementations, QRD is also implemented on both TTA and FPGA. Modified Gram–Schmidt algorithm is used in both QRD implementations.

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Acknowledgments

The authors would like to thank Xilinx Inc., especially J. Noguera, B. Ozgul and J. Keskinen, for the possibility to evaluate Xilinx Vivado High Level Synthesis tool and for their co-operation. The authors would also like to thank J. Ketonen for her efforts related to this paper.

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Authors and Affiliations

  1. Centre for Wireless Communications, University of Oulu, Oulu, Finland

    Tuomo Hänninen, Janne Janhunen & Markku Juntti

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  1. Tuomo Hänninen
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  2. Janne Janhunen
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  3. Markku Juntti
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Correspondence to Tuomo Hänninen.

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Hänninen, T., Janhunen, J. & Juntti, M. Novel detector implementations for 3G LTE downlink and uplink. Analog Integr Circ Sig Process 78, 645–655 (2014). https://doi.org/10.1007/s10470-013-0128-5

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  • DOI: https://doi.org/10.1007/s10470-013-0128-5

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