Abstract
This paper describes a fully-passive discrete-time switched-capacitor RF downconverter with an on-chip oscillator, that combines quadrature mixing and harmonic rejection, designed in a 130 nm digital CMOS technology. By using MOS capacitors (varactors) to perform parametric amplification, it is possible to achieve a measured gain enhancement of about 12 dB, together with 21 dB noise figure and more than 5 dBm IIP3. Operating in the VHF-III band, the downconverter core dissipates 6.2 mW and occupies 0.024 mm2.
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Acknowledgements
This work was supported by the Portuguese Foundation for Science and Technology (CTS multiannual funding through project PEst-OE/EEI/ UI0066/2011, project IMPACT (PTDC/EEA-ELC/101421/2008), and project DISRUPTIVE (EXCL/EEI-ELC/0261/2012).
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Custódio, J.R., Bastos, I., Oliveira, L.B. et al. A 6.2 mW 0.024 mm2 fully-passive RF downconverter with 12 dB gain enhancement using MOS parametric amplification. Analog Integr Circ Sig Process 75, 299–304 (2013). https://doi.org/10.1007/s10470-013-0049-3
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DOI: https://doi.org/10.1007/s10470-013-0049-3