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A single capacitor loop filter phase-locked loop with frequency voltage converter

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Abstract

A novel phase-locked loop that has a loop filter consisting of only one capacitor is designed with a frequency voltage converter (FVC). Simulation and measurement results show that the proposed phase-locked loop (PLL) works stably demonstrating that the FVC works effectively as a resistor. Measurement results of the proposed PLL fabricated in a one-poly six-metal 0.18 μm CMOS process show that the phase noise is −109 dBc/Hz at 10 MHz offset from 752.7 MHz output frequency.

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Acknowledgments

This work was supported by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2011-0007768).

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Authors and Affiliations

  1. Department of Electronics Engineering, Pukyong National University, 599-1 Daeyeon 3-dong, Nam-gu, Busan, 698-737, South Korea

    Jeong-hoon Nam & Young-Shig Choi

  2. Department of Telecommunication Engineering, Pukyong National University, 599-1 Daeyeon 3-dong, Nam-gu, Busan, 698-737, South Korea

    Moon G. Joo

Authors
  1. Jeong-hoon Nam
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  2. Young-Shig Choi
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  3. Moon G. Joo
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Correspondence to Young-Shig Choi.

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Nam, Jh., Choi, YS. & Joo, M.G. A single capacitor loop filter phase-locked loop with frequency voltage converter. Analog Integr Circ Sig Process 74, 193–201 (2013). https://doi.org/10.1007/s10470-012-9978-5

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  • DOI: https://doi.org/10.1007/s10470-012-9978-5

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