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A four-quadrant analog multiplier under a single power supply voltage

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Abstract

An analog multiplier driven by a single supply voltage is proposed. Some improvements are introduced so as to get a higher performance. The proposed analog multiplier can work precisely in four quadrants with a very small THD. An added OTA keeps the linearity error of the circuit smaller than 1%. The presented multiplier is designed on the 0.6 μm BCD process and the simulation results by HSPICE shows a perfect performance. It can be used in any system that requires a high performance analog multiplier.

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Authors and Affiliations

  1. Xidian University, No. 2 TaiBai South Road, Xi’an, Shannxi, China

    Xiaobing Tao, Chao Liu & Tao Zhao

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  1. Xiaobing Tao
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  2. Chao Liu
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  3. Tao Zhao
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Correspondence to Xiaobing Tao.

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Tao, X., Liu, C. & Zhao, T. A four-quadrant analog multiplier under a single power supply voltage. Analog Integr Circ Sig Process 71, 525–530 (2012). https://doi.org/10.1007/s10470-011-9692-8

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  • DOI: https://doi.org/10.1007/s10470-011-9692-8

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