Abstract
An amplifier topology based on a transformer-coupled cascode stage is presented and compared with the most used solutions for sub-μm CMOS power amplifiers, which are the common-source stage, cascode stage, and capacitive-coupled cascode stage. The comparison was carried out by designing each amplifier in a 65-nm CMOS technology and for a 60-GHz operating frequency. The design was optimized for a trade off among power gain, saturated output power, and linearity. Operating from a 1.2-V supply voltage, the proposed amplifier improves both small-signal and large-signal performance with respect to the most common approaches, thus demonstrating effectiveness with sub-μm CMOS technologies and mm-wave operation.
References
Pinel, S., et al. (2009). 60 GHz Single-chip CMOS digital radios and phased array solutions for gaming and connectivity. IEEE Journal on Selected Areas in Communications, 27, 1347–1356.
Marcu, C., et al. (2009). A 90nm low-power 60GHz transceiver with integrated baseband circuitry. IEEE International Solid-State Circuit Conference. Digest of Technical Papers, 314-315.
Tanomura, M., Hamada, Y., Kishimoto, S., Ito, M., Orihashi, N., Maruhashi, K., et al. (2008). TX and RX front-ends for 60 GHz band in 90 nm standard bulk CMOS. IEEE International Solid-State Circuit Conference. Digest of Technical Papers, 558-559.
Reynolds, S. K., et al. (2006). A silicon 60-GHz receiver and transmitter chipset for broadband communications. IEEE Journal of Solid-State Circuits, 41, 2820–2831.
Cohen, E., Ravid, S., Ritter, D. (2008). An ultra low power LNA with 15 dB gain and 4.4 dB NF in 90 nm CMOS process for 60 GHz phase array radio. IEEE Radio Frequency Integrated Circuits Symposium, 61-64.
Shigematsu, H., Hirose, T., Brewer, F., & Rodwell, M. (2005). Millimeter-wave CMOS circuit design. IEEE Transactions on Microwave Theory and Techniques, 53, 472–477.
Lont, M., et al. (2009). A 60 GHz Miller effect based VCO in 65 nm CMOS with 10.5% tuning range. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 1-4.
Chan, W. L., Long, J. R., Spirito, M., & Pekaric, J. J. (2009). A 60GHz-band 1 V 11.5 dBm power amplifier with 11% PAE in 65nm CMOS. IEEE International Solid-State Circuit Conference. Digest of Technical Papers, 380-381.
Fouad, H., Sharaf, K., El-Diwany, E., El-Hennaway, H. (2002). An RF CMOS modified cascode LNA with inductive source degeneration. IEEE Radio Science Conference. Digest of Technical Papers, 450-457.
Jamison, S. A., et al. (1982). Inductively coupled push-pull amplifiers for low cost monolithic microwave ICs. IEEE GaAs IC Symposium. Digest of Technical papers, 91–94.
Simburger, W., et al. (1999). A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz. IEEE Journal of Solid-State Circuit, 34, 1881–1892.
Long, J. R. (2000). Monolithic transformers for silicon RF IC design. IEEE Journal of Solid-State Circuits, 35, 1368–1382.
Cripps, S. C. (2006). RF power amplifiers for wireless communications. Boston, MA: Artech House.
Scuderi, A., Biondi, T., Ragonese, E., & Palmisano, G. (2004). A lumped scalable model for silicon integrated spiral inductors. IEEE Transactions on Circuits and Systems I, 51, 1203–1209.
Biondi, T., Scuderi, A., Ragonese, E., & Palmisano, G. (2006). Analysis and modeling of layout scaling in silicon integrated stacked transformers. IEEE Transactions on Microwave Theory and Techniques, 54, 2203–2210.
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Giammello, V., Ragonese, E. & Palmisano, G. Transformer-coupled cascode stage for mm-wave power amplifiers in sub-μm CMOS technology. Analog Integr Circ Sig Process 66, 449–453 (2011). https://doi.org/10.1007/s10470-010-9574-5
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DOI: https://doi.org/10.1007/s10470-010-9574-5