Abstract
A 7-channel imaging diversity receiver based on current-summing is implemented in a 180 nm CMOS technology for broadband free-space optical (FSO) multi-input/multi-output (MIMO) communication. Each channel employs a low input-impedance current mirror (CM) as the input stage, which allows the implementation of direct current-summing for equal-gain combining (EGC). The summed current signal drives a second stage transimpedance amplifier (TIA) to generate the output voltage. Electrical characterization was performed using a photodiode emulation circuit and chip-on-board FR-4 assembly, demonstrating a total transimpedance gain of 62 dBΩ, −3 dB bandwidth of 1.2 GHz, and eye diagrams up to 2 Gb/s for 0.25 pF photodiode capacitance. The theoretical sensitivity of the imaging receiver is −16.8 dBm for a bit error rate (BER) of 10−9 at a photodetector responsivity of 0.4 A/W. The simulated power consumption for a single front-end amplifier circuit is 4.2 mW, and for the second stage TIA is 10.3 mW from a single 1.8 V supply. The diversity receiver is flip-chip compatible to enable hybrid integration to a custom InGaAs photodetector array.
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This work was supported by the National Science Foundation under Grant No. ECCS-0823946.
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Joyner, V.M., Zeng, J. A CMOS imaging diversity receiver for gigabit free-space optical MIMO. Analog Integr Circ Sig Process 66, 371–379 (2011). https://doi.org/10.1007/s10470-010-9535-z
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DOI: https://doi.org/10.1007/s10470-010-9535-z