Abstract
In this article the contribution of the digital \(\Upsigma\Updelta\) modulator in fractional frequency synthesizers is explored. Due to the circuit’s non linear behavior, the spur tones generated by the digital \(\Upsigma\Updelta\) modulation degrade the synthesizer’s phase noise even in regions where the charge pump noise is dominant. A new method to dither digital MASH \(\Upsigma\Updelta\) modulators for fractional frequency synthesizers is proposed. The method barely increases the circuit complexity and has the same performance as more cumbersome architectures. Also, a new design consideration to linearize the voltage control oscillator is proposed. Experimental results are obtained in an on-chip fractional synthesizer manufactured in CMOS technology.
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Acknowledgements
This work was partially supported by CONACyT Mexico with the project J45732, the grant #131617 and by the Italian National Program FIRB #RBAP06L4S5.
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Gonzalez-Diaz, V.R., Garcia-Andrade, M.A., Espinosa F. V., G. et al. Optimized reduction of spur tones in fractional frequency synthesizers. Analog Integr Circ Sig Process 65, 245–251 (2010). https://doi.org/10.1007/s10470-010-9473-9
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DOI: https://doi.org/10.1007/s10470-010-9473-9