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60 GHz amplifier employing slow-wave transmission lines in 65-nm CMOS

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Abstract

A three-stage V-band amplifier implemented in 65-nm baseline CMOS technology is presented in this paper. Slow-wave coplanar waveguides are used for matching and interconnects to study the benefits of using this line type in amplifier design. Measured power gain, noise figure and 1 dB output compression point at 60 GHz are 13 dB, 6.3 dB and +4 dBm, respectively. The amplifier has 19.6 GHz of 3 dB bandwidth, thus covering entirely the unlicensed band around 60 GHz. The performance is achieved with a 1.2 V supply and 45 mA DC current consumption.

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Acknowledgments

The authors would like to thank Hannu Hakojärvi and Mikko Kantanen for on-wafer measurements at MilliLab, The Millimetre Laboratory of Finland. This work was funded by Tekes, Finnish Funding Agency for Technology and Innovation under Brawe-project.

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Correspondence to Dan Sandström.

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Sandström, D., Varonen, M., Kärkkäinen, M. et al. 60 GHz amplifier employing slow-wave transmission lines in 65-nm CMOS. Analog Integr Circ Sig Process 64, 223–231 (2010). https://doi.org/10.1007/s10470-009-9415-6

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  • DOI: https://doi.org/10.1007/s10470-009-9415-6

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