On the reduction of thermal and flicker noise in ENG signal recording amplifiers

Abstract

Because of the extremely low amplitude of the input signal, the design of electro-neuro-graph (ENG) amplifiers involves a special care for flicker and thermal noise reduction. The task becomes really challenging in the case of implantable electronics, because power consumption is restricted to few hundreds μW. In this work, two different circuit techniques aimed to reduce flicker and thermal noise, in ultra-low noise amplifiers for implantable medical devices, are demonstrated. The circuit design, and measurement results are presented, in both cases showing an excellent performance, and noise to power consumption trade-off. In the first circuit, a very simple low-pass Gm–C chopper amplifier is used for flicker noise cancellation. It consumes only 28 mW, with a measured input referred noise and offset of 2  \( {{{\text{nV}}} \mathord{\left/ {\vphantom {{{\text{nV}}} {\sqrt {{\text{Hz}}} }}} \right. \kern-\nulldelimiterspace} {\sqrt {{\text{Hz}}} }} \), and 2.5 μV, respectively. In the second circuit, a ultra-low noise amplifier, a energy-efficient DC–DC down-converter, and low voltage design techniques are combined, for the reduction of thermal noise with a minimum power consumption. Measured input referred noise in this case was 5.5 \( {{{\text{nV}}} \mathord{\left/ {\vphantom {{{\text{nV}}} {\sqrt {{\text{Hz}}} }}} \right. \kern-\nulldelimiterspace} {\sqrt {{\text{Hz}}} }} \) at only 380 μW power consumption. Both circuits were fabricated in a 1.5 μm technology.

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References

  1. 1.

    Rieger, R., Taylor, J., Demosthenous, A., Donaldson, N., & Langlois, P. J. (2003). Design of a low-noise preamplifier for nerve cuff electrode recording. IEEE Journal of Solid State Circuits, 38(8), 1373–1379. doi:10.1109/JSSC.2003.814437.

    Article  Google Scholar 

  2. 2.

    Gosselin, B., & Simard, V. (2004). Low-power implantable microsystem intended to multichannel cortical recording. IEEE International Symposium on Circuits and Systems (ISCAS’04), IV, 5–8.

    Google Scholar 

  3. 3.

    Uranga, A., Lago, N., Navarro, X., & Barniol, N. (2004). Integrated CMOS amplifier for ENG signal recording. IEEE Transactions on Biomedical Engineering, 51(12), 2188–2193. doi:10.1109/TBME.2004.834253.

    Article  Google Scholar 

  4. 4.

    Sacristan, J., & Oses, M. T. (2004). Low noise amplifier for recording ENG signals in implantable systems. IEEE International Symposium on Circuits and Systems (ISCAS’04), IV, 33–36.

    Google Scholar 

  5. 5.

    Demosthenous, A., & Triantis, I. F. (2005). An adaptive ENG amplifier for tripolar cuff electrodes. IEEE Journal of Solid State Circuits, 40(2), 412–421. doi:10.1109/JSSC.2004.840957.

    Article  Google Scholar 

  6. 6.

    Barú, M. (2006). Implantable signal amplifying circuit for electroneurographic recording. U.S. Patent 6,996,435 (issued February 7th, 2006).

  7. 7.

    R. Rieger, et al. (2006). Very low-noise ENG amplifier system using CMOS technology. IEEE Transactions on Neural Systems and Rehabilitation Engineering, 14(4). doi:10.1109/TNSRE.2006.886731.

  8. 8.

    Arnaud, A., & Galup Montoro, C. (2004). Consistent noise models for analysis and design of CMOS circuits. IEEE Trans.Circuits & Systems I, 51(10), 1909–1915. doi:10.1109/TCSI.2004.835028.

    Article  Google Scholar 

  9. 9.

    Enz, C. C., & Temes, G. C. (1996). Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization. Proceedings of the IEEE, 84(11), 1584–1614. doi:10.1109/5.542410.

    Article  Google Scholar 

  10. 10.

    Menolfi, C., & Huang, Q. (1999). A fully integrated, untrimmed CMOS instrumentation amplifier with submicrovolt offset. IEEE Journal of Solid State Circuits, 34(3), 415–420. doi:10.1109/4.748194.

    Article  Google Scholar 

  11. 11.

    Bakker, A., Thiele, K., & Huijsing, J. H. (2000). A CMOS nested-chopper instrumentation amplifier with 100-nV offset. IEEE Journal of Solid State Circuits, 35(12), 1877–1883. doi:10.1109/4.890300.

    Article  Google Scholar 

  12. 12.

    Arnaud, A. (2005). An efficient chopper amplifier, using a switched Gm-C filter technique. 18th Symposium on Integrated Circuits and Systems Design —SBCCI 05, Florianopolis, Brazil.

  13. 13.

    Tóth, L., & Tsividis, Y. P. (2003). Generalization of the principle of chopper stabilization. IEEE Transactions on Circuits and Systems, Fundamental Theory Application, 50(8), 975–983. doi:10.1109/TCSI.2003.815188

    Article  Google Scholar 

  14. 14.

    Bakker, A., & Huijsing, J. H. (1997). A CMOS chopper opamp with integrated low-pass filter. In Proceedings of European Solid State Circuits Conference, Southampton-UK.

  15. 15.

    Silveira, F., & Flandre, D. (2004). Low power analog CMOS for cardiac pacemakers—design and optimization in bulk and SOI technologies. Kluwer Academic Publishers, ISBN 140207719X.

  16. 16.

    Linden, D., & Reddy, T. B. (Eds.). (2002). Handbook of batteries (3d ed.). McGraw Hill, ISBN-0-07-135978-8.

  17. 17.

    Soykan, O. (2002). Power sources for implantable medical devices. Medical Device Manufacturing & Technology, 76–79.

  18. 18.

    Quallion LLC, QL-series medical grade rechargeable lithium-ion batteries datasheets. http://www.quallion.com/sub-sp-main.asp.

  19. 19.

    Wong, L. S. Y., et al. (2004). A very low power CMOS mixed signal IC for implantable pacemaker applications. IEEE Journal of Solid State Circuits, 39(12), 2446–2456.

    Google Scholar 

  20. 20.

    Novo, A., et al. (1999). Programmable voltage multipliers for pacemaker output pulse generation in CMOS 0.8 um technology. In Proceeding of the 25th European Solid State Circuits Conference ESSCIRC’99 (pp. 386–389).

  21. 21.

    Denison, T., Consoer, K., Kelly, A., Hachenburg, A., & Santa, W. (2007). A 2.2 μW 94nV/√Hz, chopper-stabilized instrumentation amplifier for EEG detection in chronic implants. IEEE International Solid-State Circuits Conference–ISSCC 2007.

  22. 22.

    Arnaud, A., & Galup-Montoro, C. (2006). Fully integrated signal conditioning of an accelerometer for implantable pacemakers. Analog Integrated Circuits and Signal Processing, 49, 313–321. doi:10.1007/s10470-006-9708-y.

    Article  Google Scholar 

  23. 23.

    Arnaud, A., Fiorelli, R., & Galup Montoro, C. (2006). Nanowatt, Sub-nS OTAs, with Sub-10-mV input offset, using series-parallel current mirrors. IEEE Journal of Solid State Circuits, 41(9), 2009–2018. doi:10.1109/JSSC.2006.880606.

    Article  Google Scholar 

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Acknowledgement

The authors would like to thank Fondo Clemente Estable, grant 10057 for making possible in part this research.

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Correspondence to Alfredo Arnaud.

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Gak, J., Miguez, M., Bremermann, M. et al. On the reduction of thermal and flicker noise in ENG signal recording amplifiers. Analog Integr Circ Sig Process 57, 39–48 (2008). https://doi.org/10.1007/s10470-008-9187-4

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Keywords

  • Analog design techniques
  • CMOS
  • Low-power
  • Low-noise